• Title/Summary/Keyword: 전력 소모

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A Design of High Efficiency Distributed Amplifier Using Optimum Transmission Line (최적 전송 선로를 이용한 고효율 분산형 증폭기의 설계)

  • Choi, Heung-Jae;Ryu, Nam-Sik;Jeong, Young-Chae;Kim, Chul-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.1
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    • pp.15-22
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    • 2008
  • In this paper, we propose a numerical analysis on reversed current of distributed amplifier based on transmission line theory and proposed a theory to obtain optimum transmission line length to minimize the reversed currents by cancelling those components. The reversed current is analyzed as being simply absorbed into the terminal resistance in the conventional analysis. In the proposed analysis, however, they are designed to be cancelled by each other with opposite phase by the optimal length of the transmission lint Circuit simulation and implementation using pHEMT transistor were performed to validate the proposed theory with the cutoff frequency of 3.6 GHz. From the measurement, maximum gain of 14.5dB and minimum gain of 12.3dB were achieved In the operation band. Moreover, measured efficiency of the proposed distributed amplifier is 25.6% at 3 GHz, which is 7.6%, higher than the conventional distributed amplifier. Measured output power Is about 10.9dBm, achieving 1.7dB higher output power than the conventional one. Those improvement is thought to be based on the cancellation of refersed current.

Design of 24-GHz 1Tx 2Rx FMCW Transceiver (24 GHz 1Tx 2Rx FMCW 송수신기 설계)

  • Kim, Tae-Hyun;Kwon, Oh-Yun;Kim, Jun-Seong;Park, Jae-Hyun;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.10
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    • pp.758-765
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    • 2018
  • This paper presents a 24-GHz frequency-modulated continuous wave(FMCW) radar transceiver with two Rx and one Tx channels in 65-nm complementary metal-oxide-semiconductor(CMOS) process and implemented it on a radar system using the developed transceiver chip. The transceiver chip includes a $14{\times}$ frequency multiplier, low-noise amplifier, down-conversion mixer, and power amplifier(PA). The transmitter achieves >10 dBm output power from 23.8 to 24.36 GHz and the phase noise is -97.3 GHz/Hz at a 1-MHz offset. The receiver achieves 25.2 dB conversion gain and output $P_{1dB}$ of -31.7 dBm. The transceiver consumes 295 mW of power and occupies an area of $1.63{\times}1.6mm^2$. The radar system is fabricated on a low-loss Duroid printed circuit board(PCB) stacked on the low-cost FR4 PCBs. The chip and antenna are placed on the Duroid PCB with interconnects and bias, gain blocks and FMCW signal-generating circuitry are mounted on the FR4 PCB. The transmit antenna is a $4{\times}4$ patch array with 14.76 dBi gain and receiving antennas are two $4{\times}2$ patch antennas with a gain of 11.77 dBi. The operation of the radar is evaluated and confirmed by detecting the range and azimuthal angle of the corner reflectors.

A 0.18-μm CMOS Baseband Circuits for the IEEE 802.15.4g MR-OFDM SUN Standard (IEEE 802.15.4g MR-OFDM SUN 표준을 지원하는 0.18-μm CMOS 기저대역 회로 설계에 관한 연구)

  • Bae, Jun-Woo;Kim, Chang-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.3
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    • pp.685-690
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    • 2013
  • This paper has proposed a multi-channel and wide gain-range baseband circuit blocks for the IEEE 802.15.4g MR-OFDM SUN systems. The proposed baseband circuit blocks consist of two negative-feedback VGAs, an active-RC 5th-order chebyshev low-pass-filter, and a DC-offset cancellation circuit. The proposed baseband circuit blocks provide 1 dB cut-off frequencies of 100 kHz, 200 kHz, 400 kHz, and 600 kHz respectively, and achieve a wide gain-range of +7 dB~+84 dB with 1 dB step. In addition, a DC-offset cancellation circuit has been adopted to mitigate DC-offset problems in direct-conversion receiver. Simulation results show a maximum input differential voltage of $1.5V_{pp}$ and noise figure of 42 dB and 37.6 dB at 5 kHz and 500 kHz, respectively. The proposed I-and Q-path baseband circuits have been implemented in $0.18-{\mu}m$ CMOS technology and consume 17 mW from a 1.8 V supply voltage.

Energy-efficient Correlated Data Placement Techniques for Multi-disk-based Mobile Systems (다중 디스크 기반 모바일 시스템 대상의 에너지 효율적인 연관 데이타 배치 기법)

  • Kim, Young-Jin;Kwon, Kwon-Taek;Kim, Ji-Hong
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.3
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    • pp.101-112
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    • 2007
  • Hard disks have been the most prevalent secondary storage devices and these days their usage is becoming more important in mobile computing systems due to I/O intensive applications such as multimedia applications and games. However, significant power consumption in the disk drives still limits battery lifetimes of mobile systems critically. In this paper, we show that using several smaller disks (instead of one large disk) can be an energy-efficient secondary storage solution on typical mobile platforms without a significant performance delay. Also, we propose a novel energy-efficient technique, which clusters related data into groups and migrates the correlated groups to the same disk. We compare this method with the existing data concentration scheme, and also combine them. The experiments show that our technique saves the energy consumption up to 34% when a pair of 1.8' disks is used instead of a single 2.5' disk with a negligible increase in the average response time. The results also show that our method also saves up to 14.8% of disk energy consumption and improve the average I/O response time by up to 10 times over the existing scheme.

Analysis on Energy Consumption Required for Building DTLS Session Between Lightweight Devices in Internet of Things (사물인터넷에서 경량화 장치 간 DTLS 세션 설정 시 에너지 소비량 분석)

  • Kwon, Hyeokjin;Kang, Namhi
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.8
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    • pp.1588-1596
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    • 2015
  • In the Internet of Things (IoT), resource-constrained devices such as sensors are capable of communicating and exchanging data over the Internet. The IETF standard group has specified an application protocol CoAP, which uses UDP as a transport protocol, allows such a lightweight device to transmit data. Also, the IETF recommended the DTLS binding for securing CoAP. However, additional features should be added to the DTLS protocol to resolve several problems such as packet loss, reordering, fragmentation and replay attack. Consequently, performance of DTLS is worse than TLS. It is highly required for lightweight devices powered by small battery to design and implement a security protocol in an energy efficient manner. This paper thus discusses about DTLS performance in the perspective of energy consumption. To analyze the performance, we implemented IEEE 802.15.4 based test network consisting of constrained sensor devices in the Cooja simulator. We measured energy consumptions required for each of DTLS client and server in the test network. This paper compares the energy consumption and amount of transmitted data of each flight of DTLS handshake, and the processing and receiving time. We present the analyzed results with regard to code size, cipher primitive and fragmentation as well.

A Fully Integrated Low-IF Receiver using Poly Phase Filter for VHF Applications (다중위상필터(Poly Phase Filter)를 이용한 VHF용 Low-IF 수신기 설계)

  • Kim, Seong-Do;Park, Dong-Woon;Oh, Seung-Hyeub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5A
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    • pp.482-489
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    • 2010
  • In this paper we have proposed a new architecture of DQ-IRM(Double-Quadrature Image Rejection Mixer) for image rejection in the low-IF receiver. It consist of a frequency-tunable RF PPF(Poly Phase Filter) and the quadrature mixers. The conventional DQ-IRM generates the quadrature RF signals for the RF wide band at once. But the proposed DQ-IRM with the frequency-tuable RF PPF generates the quadrature RF signals for the narrow band of 2~3 channels bandwidth, which is partitioned from the RF wide band. We designed the CMOS RF tuner for T-DMB(Terrestrial Digital Multimedia Broadcasting) with the proposed 3rd DQ-IRM using a 0.18um CMOS technology and verified the performances of the designed receiver such as the image rejection ratio, the noise figure and the power consumption. The overall NF of the RF tuner is about 1.26 dB and the image reject ratio is about 51 dB. The power consumption is 55.8 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

A High Performance Flash Memory Solid State Disk (고성능 플래시 메모리 솔리드 스테이트 디스크)

  • Yoon, Jin-Hyuk;Nam, Eyee-Hyun;Seong, Yoon-Jae;Kim, Hong-Seok;Min, Sang-Lyul;Cho, Yoo-Kun
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.4
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    • pp.378-388
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    • 2008
  • Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

An Indirect Localization Scheme for Low- Density Sensor Nodes in Wireless Sensor Networks (무선 센서 네트워크에서 저밀도 센서 노드에 대한 간접 위치 추정 알고리즘)

  • Jung, Young-Seok;Wu, Mary;Kim, Chong-Gun
    • Journal of the Institute of Convergence Signal Processing
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    • v.13 no.1
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    • pp.32-38
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    • 2012
  • Each sensor node can know its location in several ways, if the node process the information based on its geographical position in sensor networks. In the localization scheme using GPS, there could be nodes that don't know their locations because the scheme requires line of sight to radio wave. Moreover, this scheme is high costly and consumes a lot of power. The localization scheme without GPS uses a sophisticated mathematical algorithm estimating location of sensor nodes that may be inaccurate. AHLoS(Ad Hoc Localization System) is a hybrid scheme using both GPS and location estimation algorithm. In AHLoS, the GPS node, which can receive its location from GPS, broadcasts its location to adjacent normal nodes which are not GPS devices. Normal nodes can estimate their location by using iterative triangulation algorithms if they receive at least three beacons which contain the position informations of neighbor nodes. But, there are some cases that a normal node receives less than two beacons by geographical conditions, network density, movements of nodes in sensor networks. We propose an indirect localization scheme for low-density sensor nodes which are difficult to receive directly at least three beacons from GPS nodes in wireless network.

KITSAT-1/2 ANALOG SUN SENSORS-IN-ORBIT RESULTS (우리별 1, 2호 아날로그 태양 감지기의 궤도상 운용결과)

  • 장현석;김병진;임광수;성단근;최순달
    • Journal of Astronomy and Space Sciences
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    • v.13 no.2
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    • pp.173-180
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    • 1996
  • This paper briefly describes the KITSAT-1 and KITSAT-2 spacecrafts and presents the functions, calibration procedures and in-orbit results of the KITSAT-2 analog sun sensors have been flown as an experimental payload for the future mission. We have two constraints in their design: small size and very low power consumption due to the tight mass and power budget of the spacecraft. Two one-dimensional analog sun sensors are mounted on the top facet of the KITSAT-2 spaceraft. Each has $\pm$60 degrees of view angle and they cover 210 degree field of view in total as the 30 degree view angles are overlapped. Only the relative sun angle around the Z-axis (yaw-axis) and the spin rate of the spacecraft can be achieved as the one dimensional sun sensors are used and they are aligned with the Z-axis. The calibration formulae are obtained using the fifth order line fitting algorithm for each sun sensor on the ground and they are applied to the obtained in-orbit data. ASS-1 with silicon solar cells has maximum error of 1.5 degree and ASS-2 with silicon photocells manufactured at KAIST has maximum error of 0.5 degree except near 0 degree of sun ray incident anagle where random reflection of incident sun ray is maximum in orbit. The results are presented in chapter 4. The performance of each sun sensor and the possible mounting errors are stated in chapter 5.

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A Study on The Characteristics of Solar Cell by Thermal Shock test (열충격 시험을 통한 태양전지 특성에 관한 연구)

  • Kang, Min-Soo;Jeon, Yu-Jae;Shin, Young-Eui
    • Journal of Energy Engineering
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    • v.21 no.3
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    • pp.249-253
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    • 2012
  • In this study, The report analysed the characteristics of power drop in solar cell through thermal shock test. The solar cells were tested 500 cycles in $-40^{\circ}C$ lowest temperature and $120^{\circ}C$ highest temperature by thermal shock test on ironbound conditions, that excerpted standard of PV Module(KS C IEC-61215). The result of the efficiency analysis through measure of I-V, efficiency of Cell decreased from 13.9% to 11.0% and decreasing rate was 20.9% after test. The result of the surface analysis through EL, solar cell has damage of gridfinger and ribbon joint. Cell cracks were founded in damage of cells through cross section of solar cells. Also, Fill factors were decreased from 72.3% to 62.0% after thermal shock test and decreasing rate is 11.8%. therefore, Yearly power drop is aggravated with facts that cell crack, damage of surface and power loss of cell by change of I-V characteristic curve with decreasing of parallel resistance.