• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.6
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• pp.1145-1152
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• 2019

In this paper, a low power current mode 12-bit ADC(: Analog to Digital Converter) is proposed to mix digital circuits and analog circuits with the advantages of low power consumption and high speed operation. The proposed 12 bit ADC is implemented by using 4-bit ADC in a cascade structure, so its power consumption can be reduced, and the chip area can be reduced by using a conversion current mirror circuit. The proposed 12-bit ADC is SK Hynix 350nm process, and post-layout simulation is performed using Cadence MMSIM. It operates at a supply voltage of 3.3V and the area of the proposed circuit is 318㎛ x 514㎛. In addition, the ADC shows the possibility of operating with low power consumption of 3.4mW average power consumption in this paper.

• Journal of Navigation and Port Research
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• v.27 no.4
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• pp.443-447
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• 2003

In this work. using 0.2 GaAs modulation doped FET(MODFET), a high performance DBS downconverter MMIC was developed for direct broadcasting satellite (DBS) application. Without LNA, the downconverter MMIC showed a very low noise of 4.8 dB, which is lower by 3 dB than conventional ones. A low LO power of -10 dBm was required for the normal DBS operation of the downconverter MMIC. which reduced the power consumption via a removal of LO amplifier on MMIC. It required only a low power consumption of 175 mW, which is lower than 70 percent of conventional ones. The LO leakage power at IF output was suppressed to a lower level than 30 dBm, which removes a bulky LO rejection filter on a board. The fabricated chip, which include a mixer, If amplifiers. LO rejection filter, and active balun, exhibited a small size of $0.84{\times}0.9\textrm{mm}^2$.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.247-250
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• 2003

The current paper presents the design and implementation of a low-profile dc-to-dc converter developed as a power supply for the sustain driving: circuit inside large-area wall-mount ac PDP application systems. Details on the design and implementation of a 500 W prototype dc-to-dc converter, miniaturized within a 230 mm$\times$ 130 mm area with a thickness of 25 mm while still achieving a 95 $\%$ conversion efficiency, are presented to demonstrate the feasibility and application potentials of the proposed low-profile dc -to-dc converters.

• Electrical & Electronic Materials
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• v.17 no.8
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• pp.13-19
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• 2004

반도체 기술, 나노기술 그리고 정보통신기술의 급격한 발달과 이들 기술간의 융합으로 정보저장, 정보처리, 통신기기들의 소형화가 이루어지고 있다. 또한 이러한 기술의 발전을 바탕으로 언제 어디서나 정보를 접할 수 있는 유비쿼터스 (ubiquitous) 시대의 도래를 맞이하고 있다. 기술 및 문화의 변화에 따라 디지털 컨버전스에 부응하는 전자정보기기와 인간의 인터페이스 역할을 하는 디스플레이의 중요성이 부각되고 있다. 특히, 인터넷, IMT-2000, PDA등 정보 이용 환경의 고도화로 경박단소형, 저소비전력 및 천연색 동영상 구현 등이 가능한 모바일 디스플레이의 수요가 급증하고 있다.(중략)

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.903-906
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• 2003

In this paper, we proposed high slew-rate and low-power OP-AMP of the data driver for TFT-LCDs. Proposed OP-AMP contains newly developed rail-to-rail class-AB input circuit which enables the low-quiescent current and high slew-rate OP-AMP. The slew-rate and the quiescent current of the proposed OP-AMP are 31.2V/$\mu$sec and 5$\mu$A, respectively.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.3 s.32
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• pp.71-76
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• 2004

The power consumption of TEC for Laser diode cooling was predicted by 3-D FEM simulation and verified by experiment. The operating conditions such as power consumption of Laser diode, set temperature, ambient temperature, resistance of thermal path was considered to estimate the TEC power consumption. Using 3-D FEM simulation, the relation between TEC configuration defined by the pellet dimension and the number and power consumption was investigated for low power consumption scheme. As a result, as the thermal resistance of the pellet increased, the power consumption decreased.

• Proceedings of the Korean Information Science Society Conference
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• 2004.10a
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• pp.673-675
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• 2004

컴퓨터 시스템의 구성 요소인 디스플레이 시스템은 가장 많은 전력을 소모하는 장치이다. 디스플레이 시스템의 전력을 효과적으로 줄이기 위하여 이미지 제어, 주파수 제어 등이 있지만 가장 효과적인 것은 LCD 패널부와 백라이트(backlight)를 제어하는 것이다. 본 논문에서는 디스플레이 시스템에서 DDC(Display Data Channel)를 이용하여 패널과 백 라이트 전압 레벨을 조절하여 저전력을 구현하였다. 호스트(PC)에서 동작하는 응용프로그램의 작성과 호스트의 영령을 받아 처리할 수 있는 디스플레이부를 구현하였다. 데스크탑 컴퓨터와 15, 17인치 LCD(Liquid Crystal Display) 모니터에서 소비 전력을 측정하였으며, 2-86%정도의 소비 전력을 줄이는 결과를 확인하였다.

• 전기산업
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• v.8 no.5
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• pp.114-120
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• 1997

• Proceedings of the Korean Vacuum Society Conference
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• 2008.02a
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• pp.376-376
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• 2008

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.39-45
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• 2009

OFDM is used for achieving a high-speed data transmission in mobile wireless communication systems. Conventionally, fast Fourier transform that is the main signal processing of OFDM is implemented using digital signal processing. The DSP FFT LSI requires large power consumption. Current-mode FFT LSI with analog signal processing is one of the best solutions for high speed and low power consumption. However, for the operation of current-mode FFT LSI that has the structure of parallel-input and parallel-output, current-mode serial-to-parallel and parallel-to-serial converter are indispensable. We propose a novel current-mode SPC and PSC and full chip simulation results agree with experimental data. The proposed current-mode SPC and PSC promise the wide application of the current-mode analog signal processing in the field of low power wireless communication LSI.