• Journal of the Korean Institute of Telematics and Electronics S
• /
• v.36S no.7
• /
• pp.9-15
• /
• 1999

In this paper, we propose a bit synchronizer which is suitable for frequency hopping systems. The proposed bit synchronizer is an ADPLL in which the digital loop filter is combined with an error symbol detecting circuit. Suppressing the tracking process, when hop mute and impulse noises are detected, improves the performance of the digital loop filter and enhances the probability of the frequency hopping system. Simulation results demonstrate an improved performance of the proposed bit synchronizer compared with existing ones.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.1
• /
• pp.221-224
• /
• 2005

본 논문에서는 워터마크가 삽입된 데이터의 저작권 보호를 위하여 데이터의 복제 시 신속한 위치추적을 통한 불법 복제 방지 시스템을 제안하고 시뮬레이션 하였다. 제안된 방법은 복사기, 프린터, 스캐너 등에 부착된 워터마크 검출 장치로부터 워터마크 검출 시 원 워터마크 이미지와 추출된 워터마크이미지가 일정 비 이상의 상관관계가 있을 경우 불법 복제 상황으로 간주하고, 디지털 데이터로 변환된 워터마크 이미지와 주소 정보가 전력선을 통하여 전송된다. 수신단에서는 수신된 데이터의 발신자 정보를 통해 위치정보를 알아내어 불법 복제 작업현장의 위치를 추적한다. 전력선을 통신선로로 이용 시 전송신호는 전력선 채널 환경에서 임펄스 잡음에 많은 영향을 받기 때문에 본 논문에서는 제안한 시스템의 검증을 위해 AWGN과 임펄스 잡음을 고려하고 잡음 특성이 우수하고 신뢰성이 비교적 강한 DS-CDMA/BPSK 시스템을 통해 제안된 시스템을 시뮬레이션 하였다. 또한, 열악한 채널 환경으로부터 수신성능을 개선하기 위해 컨벌루션 부호화기법을 적용하여 성능 개선 전 후의 복원 이미지의 성능을 비교 분석 하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2000.05a
• /
• pp.217-221
• /
• 2000

In this paper, we analyze the effect of phase noise from PLL frequency synthesizer on 64QAM when detecting the corrupted signals. To predict the phase noise of oscillator very accurately, we considered that oscillator has the linearly time-varying nature when the input impulsive torrent to oscillator is small. The performance which detects the corrupted signal by oscillator phase noise is compared with only affected by AWCN and then analyze how much it degrade system performance for 64QAM.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.24 no.8B
• /
• pp.1532-1539
• /
• 1999

In this paper, we propose a bit synchronizer which is suitable for frequency hopping systems. The proposed bit synchronizer is an ADPLL in which the digial loop filter is combined with an error symbol detecting circuit using an adaptive window. Suppressing the tracking process when hop mute and impulse noises are detected improves the performance of the digital loop filter and enhances the probability of the frequency hopping system. The simulation results demonstrate an improved performance of the proposed bit synchronizer compared with existing ones.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.19 no.1
• /
• pp.31-38
• /
• 2024

The digital phase-locked loop(DPLL) is one of the circuits composed of a digital detector, digital loop filter, voltage-controlled oscillator, and divider as a fundamental circuit, widely used in many fields such as electrical and circuit fields. A state estimator using various mathematical algorithms is used to improve the performance of a digital phase-locked loop. Traditional state estimators have utilized Kalman filters of infinite impulse response state estimators, and digital phase-locked loops based on infinite impulse response state estimators can cause rapid performance degradation in unexpected situations such as inaccuracies in initial values, model errors, and various disturbances. In this paper, we propose a two-layer Frobenius norm-based finite impulse state estimator to design a new digital phase-locked loop. The proposed state estimator uses the estimated state of the first layer to estimate the state of the first layer with the accumulated measurement value. To verify the robust performance of the new finite impulse response state estimator-based digital phase locked-loop, simulations were performed by comparing it with the infinite impulse response state estimator in situations where noise covariance information was inaccurate.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.23 no.4
• /
• pp.431-437
• /
• 2019

PLC(Power Line Communication) is being used in various ways in smart grid system because of the advantages of low cost and high data throughput. However, power line channel has many problems due to impulse noise and various studies have been conducted to solve the problem. Recently, ACDL(Adaptive Cannonical Differential Limiter) which is based on an adaptive clipping with analog nonlinear filter, has been proposed and performs better than the others. In this paper, we show that ACDL is similar to the detection of slew rate with oversampled digital signal by simplification and analysis. Through the simulation under the PRIME standard it is shown that the proposed performs equal to or better than that of ACDL, but significantly reduce the complexity to implement. The BER performance is equal but the complexity is reduced to less than 10%.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.45 no.3
• /
• pp.19-26
• /
• 2008

We propose a selective detection scheme based on pulse repetition considering the BER (Bit Error Rate) performance and complexity of coherent IR-UWB (Impulse Radio-Ultra Wide Band) systems. To take system complexity into account, the proposed scheme transmits the UWB signals by pulse repetition at the transmitter, like conventional PRC (Pulse Repetition Coding). However, to effectively improve BER performance of the system, the proposed scheme performs selective detection by estimating the SNR (Signal-to-Noise Ratio) of the received pulse-repeated signal at the UWB receiver. Hence, the proposed scheme effectively improves BER performance of the coherent IR-UWB systems without increasing system complexity, as compared to the conventional PRC algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.11A
• /
• pp.1820-1826
• /
• 2001

In this paper, we present a modeling scheme for the already-installed two-wire home phone lines with arbitrary topologies and show that the inter-symbol interference due to the topology can be removed using an adaptive equalizer. The transmission characteristics of the arbitrary-configured two-wire home phone lines can be analyzed through the ABCD matrices. The simulation result shows that the impedance mismatch due to the branch lines renders nulls in the frequency response or delayed pulses in the impulse response. These nulls or delayed pulses cause inter-symbol interference that inhibits correct signal detection. An adaptive equalizer is shown to be effective in eliminating the interference. Also, the simulation result shows that the equalizer converges in 1.5 ms at a data rate of 1 Msps at signal-to-noise ratios greater than 15 dB. In addition, from the result of relation between E$\_$b//N$\_$and BER(Bit Error Rate), we can see that E$\_$b//N$\_$o/ more than 19 dB is required for the data communication with a BER less than 10$\^$-5/.