• Title/Summary/Keyword: 임베디드 멀티미디어

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Improvement of Set Partitioning Sorting Algorithm for Image Compression in Embedded System (임베디드 시스템의 영상압축을 위한 분할정렬 알고리즘의 개선)

  • Kim, Jin-Man;Ju, Dong-Hyun;Kim, Doo-Young
    • Journal of the Institute of Convergence Signal Processing
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    • v.6 no.3
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    • pp.107-111
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    • 2005
  • With the increasing use of multimedia technologies, image compression requires higher performance as well as new functionality in the informationized society. Specially, in the specific area of still image encoding in embedded system, a new standard, JPEG2000 that improve various problem of JPEG was developed. This paper proposed a method that reduce quantity of data delivered in EBCOT(Embedded Block Coding with Optimized Truncation) process using SPIHT(Set Partitioning in Hierarchical Trees) Algorithm to optimize selection of threshold from feature of wavelet transform coefficients and to remove sign bit in LL area for the increment of compression efficiency on JPEG2000. The experimental results showed the proposed algorithm achieves more improved bit rate in embedded system.

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A Study on a Mobile Terminal Platform for a High Speed Mobile Multimedia System (초고속 이동멀티미디어 시스템을 위한 이동단말 플랫폼 연구)

  • Ro, Kwang-Hyun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.1
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    • pp.96-103
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    • 2009
  • This paper presents a L3 mobile terminal platform of the mobile terminal system which is a subsystem of HMm(Hig-speed Mobile Multimedia) system, which layer 3 control protocols such as RC(Radio Control), SC(Session Control), MC(Mobility Control) and application services such as VOD, FTP, VoIP for a multimedia mobile terminal are implemented on. The hardware platform is based on PXA255 and supports various interfaces and multimedia devices, and under the platform, an embedded Linux generated by the self-maden cross-toolchain, L3 control protocols and application programs were installed. The operation of HMm system under the HMm testbed has shown that this platform successfully supported SIP services, web browsing services, streaming services and etc as well as call processing. It could be the reference of the upcoming Fourth-Generation mobile terminal which the multimedia functionality will be enforced.

Development of Industrial Embedded System Platform (산업용 임베디드 시스템 플랫폼 개발)

  • Kim, Dae-Nam;Kim, Kyo-Sun
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.47 no.5
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    • pp.50-60
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    • 2010
  • For the last half a century, the personal computer and software industries have been prosperous due to the incessant evolution of computer systems. In the 21st century, the embedded system market has greatly increased as the market shifted to the mobile gadget field. While a lot of multimedia gadgets such as mobile phone, navigation system, PMP, etc. are pouring into the market, most industrial control systems still rely on 8-bit micro-controllers and simple application software techniques. Unfortunately, the technological barrier which requires additional investment and higher quality manpower to overcome, and the business risks which come from the uncertainty of the market growth and the competitiveness of the resulting products have prevented the companies in the industry from taking advantage of such fancy technologies. However, high performance, low-power and low-cost hardware and software platforms will enable their high-technology products to be developed and recognized by potential clients in the future. This paper presents such a platform for industrial embedded systems. The platform was designed based on Telechips TCC8300 multimedia processor which embedded a variety of parallel hardware for the implementation of multimedia functions. And open-source Embedded Linux, TinyX and GTK+ are used for implementation of GUI to minimize technology costs. In order to estimate the expected performance and power consumption, the performance improvement and the power consumption due to each of enabled hardware sub-systems including YUV2RGB frame converter are measured. An analytic model was devised to check the feasibility of a new application and trade off its performance and power consumption. The validity of the model has been confirmed by implementing a real target system. The cost can be further mitigated by using the hardware parts which are being used for mass production products mostly in the cell-phone market.

An Efficient WLAN Device Power Control Technique for Streaming Multimedia Contents over Mobile IP Storage (모바일 IP 스토리지 상에서 멀티미디어 컨텐츠 실행을 위한 효율적인 무선랜 장치 전력제어 기법)

  • Nam, Young-Jin;Choi, Min-Seok
    • The KIPS Transactions:PartA
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    • v.16A no.5
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    • pp.357-368
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    • 2009
  • Mobile IP storage has been proposed to overcome storage limitation in the flash memory and hard disks. It provides almost capacity-free space for mobile devices over wireless IP networks. However, battery lifetime of the mobile devices is reduced rapidly because of power consumption with continuous use of a WLAN device when multimedia contents are being streamed through the mobile IP storage. This paper proposes an energy-efficient WLAN device power control technique for streaming multimedia contents with the mobile IP storage. The proposed technique consists of a prefetch buffer input/output module, a WLAN device power control module, and a reconfigurable prefetch buffer module. Besides, it adaptively determines the size of the prefetch buffer according to a quality of the multimedia contents, and it dynamically controls the power mode of the WLAN device on the basis of power on-off operations while streaming the multimedia contents. We evaluate the performance of the proposed technique on a PXA270-based mobile device that employs the embedded linux 2.6.11, Intel iSCSI reference codes, and a WLAN device. Extensive experiments reveal that the proposed technique can save the energy consumption of the WLAN device up to 8.5 times with QVGA multimedia contents, as compared with no power control.

Design and Verification of Pipelined Face Detection Hardware (파이프라인 구조의 얼굴 검출 하드웨어 설계 및 검증)

  • Kim, Shin-Ho;Jeong, Yong-Jin
    • Journal of Korea Multimedia Society
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    • v.15 no.10
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    • pp.1247-1256
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    • 2012
  • There are many filter based image processing algorithms and they usually require a huge amount of computations and memory accesses making it hard to attain a real-time performance, expecially in embedded applications. In this paper, we propose a pipelined hardware structure of the filter based face detection algorithm to show that the real time performance can be achieved by hardware design. In our design, the whole computation is divided into three pipeline stages: resizing the image (Resize), Transforming the image (ICT), and finding candidate area (Find Candidate). Each stage is optimized by considering the parallelism of the computation to reduce the number of cycles and utilizing the line memory to minimize the memory accesses. The resulting hardware uses 507 KB internal SRAM and occupies 9,039 LUTs when synthesized and configured on Xilinx Virtex5LX330 FPGA. It can operate at maximum 165MHz clock, giving the performance of 108 frame/sec, while detecting up to 20 faces.

A Study on SoC Platform Design Supporting Dynamic Cooperation between Hardware and Software Modules (하드웨어 및 소프트웨어 모듈간의 동적 협업을 지원하는 SoC 플랫폼 설계에 관한 연구)

  • Lee, Dong-Geon;Kim, Young-Mann;Tak, Sung-Woo
    • Journal of Korea Multimedia Society
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    • v.10 no.11
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    • pp.1446-1459
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    • 2007
  • This paper presents and analyzes a novel technique that makes it possible to improve the performance of low-end embedded systems through SoC(System-on-a-Chip) platform supporting dynamic cooperation between hardware and software modules. Traditional embedded systems with limited hardware resources have the poor capability of carrying out multi-tasking jobs including complex calculations. The proposed SoC platform, which provides dynamic cooperation between hardware and software modules, decomposes a single specific system into tasks for given system requirements. Additionally, we also propose a technique for efficient communication and synchronization between hardware and software tasks in cooperation with each other. Several experiments are conducted to illustrate the application and efficiency of the proposed SoC platform. They show that the proposed SoC platform outperforms the traditional embedded system, where only software tasks run, as the number of memory access is increased and the system become more complex.

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Hardware Design for JBIG2 Huffman Coder (JBIG2 허프만 부호화기의 하드웨어 설계)

  • Park, Kyung-Jun;Ko, Hyung-Hwa
    • Journal of Korea Multimedia Society
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    • v.12 no.2
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    • pp.200-208
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    • 2009
  • JBIG2, as the next generation standard for binary image compression, must be designed in hardware modules for the JBIG2 FAX to be implemented in an embedded equipment. This paper proposes a hardware module of the high-speed Huffman coder for JBIG2. The Huffman coder of JBIG2 uses selectively 15 Huffman tables. As the Huffman coder is designed to use minimal data and have an efficient memory usage, high speed processing is possible. The designed Huffman coder is ported to Virtex-4 FPGA and co-operating with a software modules on the embedded development board using Microblaze core. The designed IP was successfully verified using the simulation function test and hardware-software co-operating test. Experimental results shows the processing time is 10 times faster than that of software only on embedded system, because of hardware design using an efficient memory usage.

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Implementation of OpenGL SC Emulation Library over OpenGL (OpenGL 상에서 OpenGL SC 에뮬레이션 라이브러리 구현)

  • Baek, Nak-Hoon
    • Journal of Korea Multimedia Society
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    • v.14 no.3
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    • pp.440-448
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    • 2011
  • The needs for the OpenGL-family of the rendering library standards are highly increasing, especially for the graphical human-machine Interface on the various systems including smart phones and personal information devices. Additionally, in the case of safety-critical market for avionics, military, medical and automotive applications, OpenGL SC, the safety critical profile of the OpenGL library plays the major role for the graphical interfaces. In this paper, we represent our OpenGL SC emulation library on the OpenGL 1.x rendering pipeline which is widely available on the existing embedded systems, to provide the features of OpenGL SC standard cost-effectively. Our method can provide the OpenGL SC features at the low development cost on the embedded systems, and its implementation is also one of the fundamental elements for the emulation of embedded systems in the PC environment. Our final result now works on both of Linux-based and VxWORKS systems, showing correct execution results at the reasonable speed.

A LSB-based Efficient Selective Encryption of Fingerprint Images for Embedded Processors (임베디드 프로세서에 적합한 LSB 기반 지문영상의 효율적인 부분 암호화 방법)

  • Moon, Dae-Sung;Chung, Yong-Wha;Pan, Sung-Bum;Moon, Ki-Young;Kim, Ju-Man
    • Journal of Korea Multimedia Society
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    • v.9 no.10
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    • pp.1304-1313
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    • 2006
  • Biometric-based authentication can provide strong security guarantee about the identity of users. However, security of biometric data is particularly important as the compromise of the data will be permanent. In this paper, we propose a secure and efficient protocol to transmit fingerprint images from a fingerprint sensor to a client by exploiting characteristics of fingerprint images. Because the fingerprint sensor is computationally limited, however, such encryption algorithm may not be applied to the full fingerprint images in real-time. To reduce the computational workload on the resource-constrained sensor, we apply the encryption algorithm to a specific bitplane of each pixel of the fingerprint image. We use the LSB as specific bitplane instead of MSB used to encrypt general multimedia contents because simple attacks can reveal the fingerprint ridge information even from the MSB-based encryption. Based on the experimental results, our proposed algorithm can reduce the execution time of the full encryption by a factor of six and guarantee both the integrity and the confidentiality without any leakage of the ridge information.

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Bit Register Based Algorithm for Thread Pool Management (스레드 풀 관리를 위한 비트 레지스터 기반 알고리즘)

  • Shin, Seung-Hyeok;Jeon, Jun-Cheol
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.7 no.2
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    • pp.331-339
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    • 2017
  • This paper proposes a thread pool management technique of an websocket server that is applicable to embedded systems. WebSocket is a proposed technique for consisting a dynamic web, and is constructed using HTML5 and jQuery. Various studies have been progressing to construct a dynamic web by Apache, Oracle and etc. Previous web service systems require high-capacity, high-performance hardware specifications and are not suitable for embedded systems. The node.js which is consist of HTML5 and jQuery is a typical websocket server which is made by open sources, and is a java script based web application which is composed of a single thread. The node.js has a limitation on the performance for processing a high velocity data on the embedded system. We make up a multi-thread based websoket server which can solve the mentioned problem. The thread pool is managed by a bit register and suitable for embedded systems. To evaluate the performance of the proposed algorithm, we uses JMeter that is a network test tool.