• Title/Summary/Keyword: 읽기속도

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A Study for Configuring Hybrid Storage System include DRAM SSD and HDD devices (DRAM SSD와 하드디스크 어레이를 이용한 하이브리드 저장장치 시스템 설계)

  • Kim, Young-Hwan;Son, Jae-Gi;Park, Changwon
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.11a
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    • pp.288-289
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    • 2012
  • 최근 데이터 저장을 위한 고속 입출력에서 병목현상을 해결하기 위해 다양한 SSD(Solid State Drive) 관련 연구가 많이 수행되고 있다. 대표적인 것으로 비휘발성 메모리인 플래시와 차세대 반도체 메모리인 SCM(Storage Class Memory) SSD가 있고, 휘발성 메모리인 DRAM기반의 SSD가 있다. 플래시 또는 SCM 메모리기반 저장장치는 하드 디스크기반 저장장치에 비해 읽기 속도가 빠르며, 내구성이 강하다는 장점으로 새로운 저장장치 시스템의 저장매체로 부각되고 있으나, 단위 저장 공간 당 높은 가격으로 인해 저장장치 시스템에 적용하기 에는 많은 문제점이 있다. 최근에는 이러한 문제를 해결하기 위해 고용량의 하드디스크와 SSD를 RAID 또는 단일 저장장치 매체로 구성하는 하이브리드 저장장치에 관한 연구와 제품이 출시되고 있다. 본 논문에서는 이러한 하이브리드 저장 매체 어레이를 저장장치 시스템으로 구성하기 위한 볼륨구성과 해당 서버에 볼륨 제공 서비스를 수행하기 위한 하이브리드 저장장치 시스템 설계 방법에 대해 설명한다.

A 0.8-V Static RAM Macro Design utilizing Dual-Boosted Cell Bias Technique (이중 승압 셀 바이어스 기법을 이용한 0.8-V Static RAM Macro 설계)

  • Shim, Sang-Won;Jung, Sang-Hoon;Chung, Yeon-Bae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.28-35
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    • 2007
  • In this paper, an ultra low voltage SRAM design method based on dual-boosted cell bias technique is described. For each read/write cycle, the wordline and cell power node of the selected SRAM cells are boosted into two different voltage levels. This enhances SNM(Static Noise Margin) to a sufficient amount without an increase of the cell size, even at sub 1-V supply voltage. It also improves the SRAM circuit speed owing to increase of the cell read-out current. The proposed design technique has been demonstrated through 0.8-V, 32K-byte SRAM macro design in a $0.18-{\mu}m$ CMOS technology. Compared to the conventional cell bias technique, the simulation confirms an 135 % enhancement of the cell SNM and a 31 % faster speed at 0.8-V supply voltage. This prototype chip shows an access time of 23 ns and a power dissipation of $125\;{\mu}W/Hz$.

Optimization of FPGA-based DDR Memory Interface for better Compatibility and Speed (호환성 및 속도 향상을 위한 FPGA 기반 DDR 메모리 인터페이스의 최적화)

  • Kim, Dae-Woon;Kang, Bong-Soon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.12
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    • pp.1914-1919
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    • 2021
  • With the development of advanced industries, research on image processing hardware is essential, and timing verification at the gate level is required for actual chip operation. For FPGA-based verification, DDR3 memory interface was previously applied. But recently, as the FPGA specification has improved, DDR4 memory is used. In this case, when a previously used memory interface is applied, the timing mismatch of signals may occur and thus cannot be used. This is due to the difference in performance between CPU and memory. In this paper, the problem is solved through state optimization of the existing interface system FSM. In this process, data read speed is doubled through AXI Data Width modification. For actual case analysis, ZC706 using DDR3 memory and ZCU106 using DDR4 memory among Xilinx's SoC boards are used.

A study on the readability of web interface for the elderly user -Focused on readability of Typeface- (고령사용자를 위한 웹 인터페이스에서의 가독성에 관한 연구 -Typeface의 가독성을 중심으로-)

  • Lee, Hyun-Ju;Woo, Seo-Hye;Park, Eun-Young;Suh, Hye-Young;Back, Seung-Chul
    • Archives of design research
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    • v.20 no.3 s.71
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    • pp.315-324
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    • 2007
  • The fast development of the information technology makes Korea one of the most advanced countries in information communication in the world in a short period of time. However, the gap between the aged and the young has been seriously increased. Those who are less than 10% of the older adults are using the internet at present. It means the elderly has many difficulties in using the internet because of their physical and cognitive differences. The purpose of this study is that the aged can easily achieve and use information by developing a guidelines for the Korean typography in the web interface. A literature search was conducted on the web interface design guidelines for older adults. These guidelines were classified by interface component and the study subjects needed for the Korean internet environment were selected. The subjects are a more comfortably readable typeface according to the sizes, a proper text size of Gulim and Batang, a more comfortably readable leading size, the appropriate letter spacing, the proper line length of body, the suitable size proportion between a title and a body, and a more comfortably readable text alignment. Survey questions were made and these Questions were improved after the pretest. Both online and offline survey programs were written and the aged and the young were tested with these programs. The result of this survey shows that there are satisfaction differences between the aged and the young in the readability and legibility of the web contents. Therefore these universal guidelines to be used in the Korean typographical environment for the future aged population were specified. It is expected that this study will be used as basic data for the universal web interface where the older adults can easily use and acquire information.

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FPGA Implementation of Real-time 2-D Wavelet Image Compressor (실시간 2차원 웨이블릿 영상압축기의 FPGA 구현)

  • 서영호;김왕현;김종현;김동욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.7A
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    • pp.683-694
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    • 2002
  • In this paper, a digital image compression codec using 2D DWT(Discrete Wavelet Transform) is designed using the FPGA technology for real time operation The implemented image compression codec using wavelet decomposition consists of a wavelet kernel part for wavelet filtering process, a quantizer/huffman coder for quantization and huffman encoding of wavelet coefficients, a memory controller for interface with external memories, a input interface to process image pixels from A/D converter, a output interface for reconstructing huffman codes, which has irregular bit size, into 32-bit data having regular size data, a memory-kernel buffer to arrage data for real time process, a PCI interface part, and some modules for setting timing between each modules. Since the memory mapping method which converts read process of column-direction into read process of the row-direction is used, the read process in the vertical-direction wavelet decomposition is very efficiently processed. Global operation of wavelet codec is synchronized with the field signal of A/D converter. The global hardware process pipeline operation as the unit of field and each field and each field operation is classified as decomposition levels of wavelet transform. The implemented hardware used FPGA hardware resource of 11119(45%) LAB and 28352(9%) ESB in FPGA device of APEX20KC EP20k600CB652-7 and mapped into one FPGA without additional external logic. Also it can process 33 frames(66 fields) per second, so real-time image compression is possible.

Analyzing animation techniques used in webtoons and their potential issues (웹툰 연출의 애니메이션 기법활용과 문제점 분석)

  • Kim, Yu-mi
    • Cartoon and Animation Studies
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    • s.46
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    • pp.85-106
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    • 2017
  • With the media's shift into the digital era in the 2000s, comic book publishers attempted a transition into the new medium by establishing a distribution structure using internet networks. But that effort shied from escaping the parallel-page reading structure of traditional comics. On the other hand, webtoons are showing divers changes by redesigning the structure of traditional sequential art media; they tend to separate and allot spaces according to the vertical scroll reading method of the internet browser and include animations, sound effects and background music. This trend is also in accordance with the preferences of modern readers. Modern society has complicated social structures with the development of various media; the public is therefore exposed to different stimuli and shows characteristics of differentiated perceptions. In other words, webtoons display more relevant and entertaining characteristics by inserting sounds and using moving texts and characters in specific frames, while traditional comics require an appreciation of withdrawal and immersion like other published media. Motions in webtoons are partially applied for dramatic tension or to create an effective expression of action. For example, hand-drawn animation is adopted to express motions by dividing motion images into many layers. Sounds are also utilized, such as background music with episode-related lyrics, melodies, ambient sounds and motion-related sound effects. In addition, webtoons provide readers with new amusement by giving tactile stimuli via the vibration of a smart phone. As stated above, the vertical direction, time-based nature of animation motions and tactile stimuli used in webtoons are differentiated from published comics. However, webtoons' utilization of innovative techniques hasn't yet reached its full potential. In addition to the fact that the software used for webtoon effects is operationally complex, this is a transitional phenomenon since there is still a lack of technical understanding of animation and sound application amongst the general public. For example, a sound might be programmed to play when a specific frame scrolls into view on the monitor, but the frame may be scrolled faster or slower than the author intended; in this case, sound can end before or after a reader sees the whole image. The motion of each frame is also programmed to start in a similar fashion. Therefore, a reader's scroll speed is related to the motion's speed. For this reason, motions might miss the intended timing and be unnatural because they are played out of context. Also, finished sound effects can disturb the concentration of readers. These problems come from a shortage of continuity; to solve these, naturally activated consecutive sounds or animations, like the simple rotation of joints when a character moves, is required.

Dry etch of Ta thin film on MTJ stack in inductively coupled plasma (ICP를 이용한 MTJ stack 위의 Ta 박막의 식각 특성 연구)

  • Kim, Dong-Pyo;Woo, Jong-Chang;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.29-29
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    • 2009
  • 현재 고집적 비휘발성 메모리 소자로는 MRAM (Magnetic Random Access Memory)과 PRAM (Phase Magnetic Random Access Memory)이 활발하게 미국과 일본, 한국 등에서 다양한 연구가 진행되어 오고 있다. 이 중에서 MRAM은 DRAM과 비슷한 10 ns의 빠른 읽기/쓰기 속도와 비휘발성 특성을 가지고 있으며, 전하를 저장할 커패시터가 필요 없고, 두 개의 자성충에 약 10 mA 정도의 전류를 가하면 그때 발생하는 약 10 Oe의 자장을 개개의 비트를 write하고, read 시에는 각 비트의 자기저항을 측정함으로써 데이터를 저장하고 읽을 있으므로, 고집적화가 가능성하다 [1]. 현재 우수한 박막 재료가 개발 되었으나, 고집적 MRAM 소자의 양산에는 해결 하여야 하는 문제점이 있다. 특히 다층 박막으로 구성되어 있으므로 식각 공정의 개발이 필수적이다. 지금까지 MRAM 재료의 식각은 주로 Ion milling, ICP, ECR등의 플라즈마 장치를 되었고, 식각 가스로는 할로겐 기체와 금속카보닐 형성을 위한 Co/$NH_3$$Ch_3OH$ 기체가 이용되고 있다. 그러나 할로겐 계열의 기체를 사용할 경우, 식각 부산물들의 높은 끓는점 때문에 식각 부산물이 박막의 표면에서 열적 탈착에 의하여 제거되지 않기 때문에 높은 에너지를 가지는 이온의 도움에 의한 식각이 필요하다. 또한 Cl 계열의 기체를 사용할 경우, 식각 공정 후, 시료가 대기에 노출되면 대기 중의 수분과 식각 부산물이 결합하여 부식 현상이 발생하게 된다. 그러므로 이를 방지하기 위한 추가 공정이 요구된다. 최근에는 부식 현상이 없고, MTJ 상부에 사용되는 Ta 또는 Ti Hard mask와의 높은 선택비를 가지는 $CH_3OH$ 또는 CO/$NH_3$가 사용되고 있다. 하부 박막에 따른 식각 특성에 연구와 다층의 박막의 식각 공정에 발생에 관한 발표는 거의 없다. MRAM을 양산에 적용하기 위하여서는 Main etch 공정에서 빠른 식각 공정이 필요하고, Over etch 공정에서 하부박막에 대한 높은 선택비가 요구된다. 그러므로 본 논문에서는 식각 변수에 따른 플라즈마 측정과 표면 반응을 비교하여 각 공정의 식각 메커니즘을 규명하고, Main Etch 공정에서는 $Cl_2$/Ar 또는 $BCl_3$/Ar 가스를 이용하여 식각 실험을 수행하고, Over etch 공정에는 낮은 Ta 박막 식각 속도를 가지는 $Ch_4/O_2$/Ar 또는 $Ch_3OH$/Ar 가스를 이용하고자 한다. 플라즈마 내의 식각종과 Ta 박막과의 반응을 XPS와 AES를 이용하여 분석하고, 식각 공정 변수에 따른 식각 속도, 식각 선택비와 식각 프로파일 변화를 SEM을 이용하여 관찰한다.

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High-Speed FPGA Implementation of SATA HDD Encryption Device based on Pipelined Architecture (고속 연산이 가능한 파이프라인 구조의 SATA HDD 암호화용 FPGA 설계 및 구현)

  • Koo, Bon-Seok;Lim, Jeong-Seok;Kim, Choon-Soo;Yoon, E-Joong;Lee, Sang-Jin
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.22 no.2
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    • pp.201-211
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    • 2012
  • This paper addresses a Full Disk Encryption hardware processor for SATA HDD in a single FPGA design, and shows its experimental result using an FPGA board. The proposed processor mainly consists of two blocks: the first block processes XTS-AES block cipher which is the IEEE P1619 standard of storage media encryption and the second block executes the interface between SATA Host (PC) and Device (HDD). To minimize the performance degradation, we designed the XTS-AES block with the 4-stage pipelined structure which can process a 128-bit block per 4 clock cycles and has 4.8Gbps (max) performance. Also, we implemented the proposed design with Xilinx ML507 FPGA board and our experiment showed 140MB/sec read/write speed in Windows XP 32-bit and a SATA II HDD. This performance is almost equivalent with the speed of the direct SATA connection without FDE devices, hence our proposed processor is very suitable for SATA HDD Full Disk Encryption environments.

Relationships between rhythm and fluency indices and listeners' ratings of Korean speakers' English paragraph reading (리듬 및 유창성 지수와 한국 화자의 영어 읽기 발화 청취 평가의 관련성)

  • Hyunsong Chung
    • Phonetics and Speech Sciences
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    • v.14 no.4
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    • pp.25-33
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    • 2022
  • This study investigates the relationships between rhythm and fluency indices and listeners' ratings of the rhythm and fluency of Korean college students' English paragraph reading. 17 university students read and recorded a passage from "The North Wind and the Sun" twice before and after three months of English pronunciation instruction. Seven in-service and pre-service English teachers in graduate school assessed the rhythm and fluency of the utterances. In addition, the values of 14 indices of rhythm and fluency were extracted from each speech and the relationships between the indices and the listeners' ratings were analyzed. The rhythm indices of the speakers in this study did not differ significantly from those of native English speakers presented in previous studies in %V, VarcoV, and nPVIV, but were higher in ΔV, ΔC, and VarcoC and lower in speech rate. The level of rhythm and fluency demonstrated by Korean college students was comparable, at least in terms of objective values for certain indices. The fluency indices, such as percentage of pauses, articulation rate, and speech rate, significantly contributed more to predicting both rhythm and fluency ratings than the rhythm indices.

A wear-leveling improving method by periodic exchanging of cold block areas and hot block areas (Cold 블록 영역과 hot 블록 영역의 주기적 교환을 통한 wear-leveling 향상 기법)

  • Jang, Si-Woong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.175-178
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    • 2008
  • While read operation on flash memory is fast and doesn't have any constraints, flash memory can not be overwritten on updating data, new data are updated in new area. If data are frequently updated, garbage collection, which is achieved by erasing blocks, should be performed to reclaim new area. Hence, because the number of erase operations is limited due to characteristics of flash memory, every block should be evenly written and erased. However, if data with access locality are processed by cost benefit algorithm with separation of hot block and cold block, though the performance of processing is high, wear-leveling is not even. In this paper, we propose CB-MG (Cost Benefit between Multi Group) algorithm in which hot data are allocated in one group and cold data in another group, and in which role of hot group and cold group is exchanged every period. Experimental results show that performance and wear-leveling of CB-MG provide better results than those of CB-S.

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