• Title/Summary/Keyword: 인증 알고리듬

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On the Optimal Selection of Wireless Access in Interoperating Heterogeneous Wireless Networks (3G/WLAN/휴대인터넷 연동상황을 고려한 사용자의 최적 무선접속서비스 선택방법에 대한 연구)

  • Cho Geun-Ho;Choe Jin-Woo;Jun Sung-Ik;Kim Young-Sae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.5B
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    • pp.456-477
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    • 2006
  • Due to advances in wireless communication technology and increasing demand for various types of wireless access, cellular, WLAN, and portable internet(such as WiBro and IEEE 802.16) systems are likely to be integrated into a unified wireless access system. This expectation premises the availability of multi-mode handsets and cooperative interworking of heterogenous wireless access networks allied by roaming contracts. Under such environments, a user may lie in the situation where more than one wireless accesses are available at his/her location, and he/she will want to choose the 'best' access among them. In this paper, we define the 'best' access(es) as the access(es) that charges minimum cost while fulfilling the required QoS of wireless access, and address the problem of choosing the optimal set of accesses theoretically by introducing a graph representation of service environment. Two optimal selection algorithms are proposed, which individually consider cases where single or multiple wireless access can be supported by multi-mode handsets.

An Implementation of Stable Optical Security System using Interferometer and Cascaded Phase Keys (간섭계와 직렬 위상 키를 이용한 안정한 광 보안 시스템의 구현)

  • Kim, Cheol-Su
    • Journal of Korea Society of Industrial Information Systems
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    • v.12 no.1
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    • pp.101-107
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    • 2007
  • In this paper, we proposed an stable optical security system using interferometer and cascaded phase keys. For the encryption process, a BPCGH(binary phase computer generated hologram) that reconstructs the origial image is designed, using an iterative algorithm and the resulting hologram is regarded as the image to be encrypted. The BPCGH is encrypted through the exclusive-OR operation with the random generated phase key image. For the decryption process, we cascade the encrypted image and phase key image and interfere with reference wave. Then decrypted hologram image is transformed into phase information. Finally, the origianl image is recovered by an inverse Fourier transformation of the phase information. During this process, interference intensity is very sensitive to external vibrations. a stable interference pattern is obtained using self-pumped phase-conjugate minor made of the photorefractive material. In the proposed security system, without a random generated key image, the original image can not be recovered. And we recover another hologram pattern according to the key images, so can be used an authorized system.

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Captive Flight Test POD System Design for Effective Development in Weapon System (무기체계의 효과적인 개발을 위한 항공탑재시험용 POD 시스템 설계)

  • Park, JungSoo
    • Journal of the Korea Convergence Society
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    • v.9 no.6
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    • pp.25-31
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    • 2018
  • Captive Flight Test (CFT) is one of the most important tests to acquire data when developing complex weapon systems. In this paper, we introduce the design and test result of our POD system for CFT. POD system uses POD set which consists of left and right POD. The exterior and mass properties of POD set are equal to those of fuel tank for aircraft so that we can omit Airworthiness Certification. Also, we adequately placed inner-equipments in order to acquire data including target image, navigation result and reference data to verify and analyse software algorithm. The POD system for CFT we developed is complex system as both mechanical and electronic factors are applied. As we repeatedly performed CFT, useful and various data for weapon development were acquired.

Digital Image Watermarking Technique Using HVS and Adaptive Scale Factor Based on the Wavelet Transform (웨이블릿 변환 기반에서의 HVS 특성 및 적응 스케일 계수를 이용한 디지털 영상 워터마킹 기법)

  • 김희정;이응주;문광석;권기룡
    • Journal of Korea Multimedia Society
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    • v.6 no.5
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    • pp.861-869
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    • 2003
  • The rapid growth of multimedia network systems has caused overflowing illegal copies of digital contents. Among digital contents, watermarking technique can be used to protect ownership about the image. Copyright protection involves the authentication of image ownership and the identification of illegal copies of image. In this paper, a new digital watermarking technique using HVS and adaptive scale factor based on the wavelet transform is proposed to use the binary image watermark. The original image is decomposed by 3-level wavelet transform. It is embedded to baseband and high frequency band. The embedding in the baseband is considered robustness, the embedding in the high frequency band is concerned about HVS and invisibility. The watermarking of a visually recognizable binary image used the HVS and random permutation to protect the copyright. From the experimental results, we confirm that the proposed technique is strong to various attacks such as joint photographic experts ground(JPEG) compression, cropping, collusion, and inversion of lines.

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Iris Recognition using Gabor Wavelet and Fuzzy LDA Method (가버 웨이블릿과 퍼지 선형 판별분석 기법을 이용한 홍채 인식)

  • Go Hyoun-Joo;Kwon Mann-Jun;Chun Myung-Geun
    • Journal of KIISE:Software and Applications
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    • v.32 no.11
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    • pp.1147-1155
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    • 2005
  • This paper deals with Iris recognition as one of biometric techniques which is applied to identify a person using his/her behavior or congenital characteristics. The Iris of a human eye has a texture that is unique and time invariant for each individual. First, we obtain the feature vector from the 2D Iris pattern having a property of size invariant and using the fuzzy LDA which is further through four types of 2D Gabor wavelet. At the recognition process, we compute the similarity measure based on the correlation values. Here, since we use four different matching values obtained from four different directional Gabor wavelet and select the maximum value, it is possible to minimize the recognition error rate. To show the usefulness of the proposed algorithm, we applied it to a biometric database consisting of 300 Iris Patterns extracted from 50 subjects and finally got more higher than $90\%$ recognition rate.

An Area-efficient Design of SHA-256 Hash Processor for IoT Security (IoT 보안을 위한 SHA-256 해시 프로세서의 면적 효율적인 설계)

  • Lee, Sang-Hyun;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.1
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    • pp.109-116
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    • 2018
  • This paper describes an area-efficient design of SHA-256 hash function that is widely used in various security protocols including digital signature, authentication code, key generation. The SHA-256 hash processor includes a padder block for padding and parsing input message, so that it can operate without software for preprocessing. Round function was designed with a 16-bit data-path that processed 64 round computations in 128 clock cycles, resulting in an optimized area per throughput (APT) performance as well as small area implementation. The SHA-256 hash processor was verified by FPGA implementation using Virtex5 device, and it was estimated that the throughput was 337 Mbps at maximum clock frequency of 116 MHz. The synthesis for ASIC implementation using a $0.18-{\mu}m$ CMOS cell library shows that it has 13,251 gate equivalents (GEs) and it can operate up to 200 MHz clock frequency.

A Design of AES-based WiBro Security Processor (AES 기반 와이브로 보안 프로세서 설계)

  • Kim, Jong-Hwan;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.7 s.361
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    • pp.71-80
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    • 2007
  • This paper describes an efficient hardware design of WiBro security processor (WBSec) supporting for the security sub-layer of WiBro wireless internet system. The WBSec processor, which is based on AES (Advanced Encryption Standard) block cipher algorithm, performs data oncryption/decryption, authentication/integrity, and key encryption/decryption for packet data protection of wireless network. It carries out the modes of ECB, CTR, CBC, CCM and key wrap/unwrap with two AES cores working in parallel. In order to achieve an area-efficient implementation, two design techniques are considered; First, round transformation block within AES core is designed using a shared structure for encryption/decryption. Secondly, SubByte/InvSubByte blocks that require the largest hardware in AES core are implemented using field transformation technique. It results that the gate count of WBSec is reduced by about 25% compared with conventional LUT (Look-Up Table)-based design. The WBSec processor designed in Verilog-HDL has about 22,350 gates, and the estimated throughput is about 16-Mbps at key wrap mode and maximum 213-Mbps at CCM mode, thus it can be used for hardware design of WiBro security system.