• Title/Summary/Keyword: 이미지센서

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A CMOS Image Sensor with Analog Gamma Correction using a Nonlinear Single Slope ADC (비선형 단일 기울기 ADC를 사용하여 아날로그 감마 보정을 적용한 CMOS 이미지 센서)

  • Ham Seog-Heon;Han Gunhee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.1 s.343
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    • pp.65-70
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    • 2006
  • An image sensor has limited dynamic range while the human eye has logarithmic response over wide range of light intensity. Although the sensor gain can be set high to identify details in darker area on the image, this results in saturation in brighter area. The gamma correction is essential to fit the human eye response. However, the digital gamma correction degrades image quality especially for darker area on the image due to the limited ADC resolution and the dynamic range. This Paper proposes a CMOS image sensor (CIS) with a nonlinear analog-to-digital converter (AU) which performs analog gamma correction. The CIS with the proposed nonlinear analog-to-digital conversion scheme was fabricated with a $0.35{\mu}m$ CMOS process. The analog gamma correction using the proposed nonlinear ADC CIS provides the 2.2dB peak-signal-to-noise-ratio(PSM) improved image qualify than conventional digital gamma correction. The PSNR of the image obtain from the digital gamma correction is 25.6dB while it is 27.8dB for analog gamma correction. The PSNR improvement over digital gamma correction is about $28.8\%$.

Design of Interface Module for Driving of Image Processing Using FPGA (FPGA를 이용한 영상처리 구동을 위한 정합모듈 설계)

  • Jung, Sung-Hyuck;Kim, Jung-Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.9
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    • pp.2071-2077
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    • 2010
  • Interface modules design between image sensor and external components are designed by FPGA (Field Programmable Gate Array) in this paper. Generally speaking, to satisfy synchronization for the poor quality data in image, SRAM is needed. To receive synchronization signal and image signal data with pixel dimension, the proposed interface logic technique is implemented. From the proposed technique, we can obtain more clear screen by implementing with pixel dimension. Operating frequency of image sensor and that of TFT-LCD are 50MHz and 6.5MHz, respectively. Most of control logic functions are embedded in FPGA. The designed logic gate counter has 33,216 and is designed by Quartus II.

An Implementation of ISP for CMOS Image Sensor (CMOS 카메라 이미지 센서용 ISP 구현)

  • Sonh, Seung-Il;Lee, Dong-Hoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.3
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    • pp.555-562
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    • 2007
  • In order to display Bayer input stream received from CMOS image sensor to the display device, image signal processing must be performed. That is, the hardware performing the image signal processing for Bayer data is called ISP(Image Signal Processor). We can see real image through ISP processing. ISP executes functionalities for gamma correction, interpolation, color space conversion, image effect, image scale, AWB, AE and AF. In this paper, we obtained the optimum algorithm through software verification of ISP module for CMOS camera image sensor and described using VHDL and verified in ModelSim6.0a simulator. Also we downloaded into Xilinx XCV-1000e for the designed ISP module and completed the board level verification using PCI interface.

Enhancement on 3 DoF Image Stitching Using Inertia Sensor Data (관성 센서 데이터를 활용한 3 DoF 이미지 스티칭 향상)

  • Kim, Minwoo;Kim, Sang-Kyun
    • Journal of Broadcast Engineering
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    • v.22 no.1
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    • pp.51-61
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    • 2017
  • This paper proposes a method to generate panoramic images by combining conventional feature extraction algorithms (e.g., SIFT, SURF, MPEG-7 CDVS) with sensed data from an inertia sensor to enhance the stitching results. The challenge of image stitching increases when the images are taken from two different mobile phones with no posture calibration. Using inertia sensor data obtained by the mobile phone, images with different yaw angles, pitch angles, roll angles are preprocessed and adjusted before performing stitching process. Performance of stitching (e.g., feature extraction time, inlier point numbers, stitching accuracy) between conventional feature extraction algorithms is reported along with the stitching performance with/without using the inertia sensor data.

Design and Implementation of Compression Technique for Efficient Image Transmission in the Wireless Sensor Networks (무선 센서 네트워크에서 효율적인 이미지 전송을 위한 압축 기법 설계 및 구현)

  • Kwon, Young-Wan;Joe, Young-Tae;Park, Chong-Myoung;Lee, Heon-Guil;Jung, In-Bum
    • Proceedings of the Korean Information Science Society Conference
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    • 2007.10d
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    • pp.435-439
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    • 2007
  • 최근 저가형 이미지 센서 기술의 발전과 무선 센서 네트워크기술의 발전으로 인해 WMSN(Wireless Multimedia Sensor Networks) 기술이 활발히 연구되고 있다. WMSN은 기존의 무선 센서 네트워크 기술에 멀티미디어 컨텐츠를 센싱하고 전송 및 처리하는 기반기술을 포함한다. 멀티미디어 컨텐츠는 많은 데이터 가지므로 이를 처리하기 위해서는 많은 계산량과 데이터 전송량을 필요로 하게 된다. 저사양의 센서 노드에서 멀티미디어 컨텐츠를 수용하기 위해서는 에너지 소모를 고려한 압축 기법 및 효율적인 전송에 대한 연구가 필요하다. 본 논문에서는 무선 센서 네트워크에서 이미지를 효율적으로 압축하고 전송하기 위하여 웨이블릿의 Resolution Scalability 특성을 이용한 4가지 움직임 보상/예측 기법을 제안한다. 이를 지원하기 위해 시스템에서 사용하는 각 압축 기법들의 조합에 따른 압축 성능이 적절함을 알아보았다.

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Resource Reservation Based Image Data Transmission Scheme for Surveillance Sensor Networks (감시정찰 센서 네트워크를 위한 자원예약 기반 이미지 데이터 전송 기법)

  • Song, Woon-Seop;Jung, Woo-Sung;Ko, Young-Bae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39C no.11
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    • pp.1104-1113
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    • 2014
  • Future combat systems can be represented as the NCW (Network Centric Warefare), which is based on the concept of Sensor-to-Shooter. A wireless video sensor networking technology, one of the core components of NCW, has been actively applied for the purpose of tactical surveillance. In such a surveillance sensor network, multi-composite sensors, especially consisting of image sensors are utilized to improve reliability for intrusion detection and enemy tracing. However, these sensors may cause a problem of requiring very high network capacity and energy consumption. In order to alleviate this problem, this paper proposes an image data transmission scheme based on resource reservation. The proposed scheme can make it possible to have more reliable image data transmission by choosing proper multiple interfaces, while trying to control resolution and compression quality of image data based on network resource availability. By the performance analysis using NS-3 simulation, we have confirmed the transmission reliability as well as energy efficiency of the proposed scheme.

A Color Interpolation Method for Improved Edge Sensing (에지 선별을 개선한 컬러 보간법)

  • Cho, Yang-Ki;Kim, Hi-Seok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.12C
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    • pp.1216-1223
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    • 2006
  • In many imaging devices, a single image sensor is used, which is covered by a color filter array to filter out the specific color components from light. Since an image acquired from this image sensors have a color components at each pixel, it is needed to be reconstructed to a perfect image. In this paper, a new color interpolation method for the imaging devices having a single image sensor is proposed. The proposed method improves a edge sensing function to obtain satisfactory results in edges of an image, md presents a new inter-channel correlation for improving interpolation performance in smooth region. We have compared our method with several exiting methods, and our experimental results have proved better interpolation performance in comparing with the other results.

Dual Image Sensor and Image Estimation Technique for Multiple Optical Interference Cancellation in High Speed Transmission Visible Light Communication Environment (고속 전송 가시광통신 환경에서의 다중 광 간섭 제거를 위한 듀얼 이미지 센서 및 이미지 추정기법)

  • Han, Doohee;Lee, Kyujin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.10a
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    • pp.480-483
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    • 2018
  • In this paper, we study the interference canceling and image sensing processing technology of multiple light sources for high speed transmission in CMOS sensor based visible light communication system. To improve transmission capacity in optical camera communications via image sensors, different data must be transmitted simultaneously from each LED. However, multiple LED light source environments for high-speed transmission can cause interference between adjacent LEDs. In this case, since the visible light communication system generally uses intensity modulation, when a plurality of LEDs transmit data at the same time, it is difficult to accurately detect the respective LEDs due to the light scattering interference of the adjacent LEDs. In order to solve this problem, the ON / OFF state of many LEDs of the light source is accurately recognized by using a dual CMOS sensor, and the spectral estimation technique and the pixel image signal processing technique of each LED are proposed. This technique can accurately recognize multiple LED pixels and improve the total average bit error rate and throughput of a MISO-VLC system.

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Shading Correction Algorithm and CMOS Image Sensing System Design (쉐이딩 보정 알고리즘과 CMOS 이미지 센싱 시스템 설계)

  • Kim, Young Bin;Ryu, Conan K.R.
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.1003-1006
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    • 2012
  • The image correction algorithm and system design for CMOS sensor to enhance the image resolution is presented in this paper. The proposed algorithm finds out the image cell from the sensor and process them by the limited memory configuration. The evaluation of the method is done by the designed hardware system. The experimental results are capable of improving contrast per channel and of sensing equalized image quality on an edge of image.

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Implementation of an Efficient Interpolation for CMOS Image Sensor (CMOS 이미지 센서용 효과적인 인터폴레이션 구현)

  • Lee, Dong-Hun;Sonh, Seung-Il
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.353-357
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    • 2005
  • 본 논문에서는 영상 입력 장치 또는 카메라 이미지 센서로부터 얻은 Bayer Data입력 포맷을 우리가 디스플레이 장치로 보는 영상으로 출력하기 위해 전처리 작업을 수행한다. 먼저 들어오는 Bayer Data Format은 인터폴레이션을 수행하여 컬러영상을 표현하기위한 한 픽셀 표현 R, G, B값을 구한다. 본 논문에서는 연산량과 필요한 레지스터의 수를 줄이고 칩의 성능을 향상시키기 위해 기존 3${\times}$3라인 쓰지 않고 2${\times}$2라인을 이용한 인터폴레이션을 수행한다. 또한 Bayer Data입력에 대한 이미지 스케일링 작업과 인터폴레이션 수행 작업을 동시에 수행한다. 이를 구현하기위해 원본 이미지 사이즈를 640${\times}$480으로 입력 데이터를 사용하고, 소프트웨어로 전처리하여 이미지 결과를 확인한 후, 최적화된 알고리즘를 적용하여 VHDL설계언어를 이용한 하드웨어 설계후, ModelSim 6.0a를 이용하여 데이터를 검증한다.

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