• 제목/요약/키워드: 웨이퍼 단위 패키징

검색결과 3건 처리시간 0.018초

기판단위 밀봉 패키징을 위한 내압 동공열의 설계 및 강도 평가 (Design and Strength Evaluation of an Anodically Bonded Pressurized Cavity Array for Wafer-Level MEMS Packaging)

  • 강태구;조영호
    • 대한기계학회논문집A
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    • 제25권1호
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    • pp.11-15
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    • 2001
  • We present the design and strength evaluation of an anodically bonded pressurized cavity array, based on the energy release rate measured from the anodically bonded plates of two dissimilar materials. From a theoretical analysis, a simple fracture mechanics model of the pressurized cavity array has been developed. The energy release rate (ERR) of the bonded cavity with an infinite bonding length has been derived in terms of cavity pressure, cavity size, bonding length, plate size and material properties. The ERR with a finite bonding length has been evaluated from the finite element analysis performed for varying cavity and plate sizes. It is found that, for an inter-cavity bonding length greater than the half of the cavity length, the bonding strength of cavity array approaches to that of the infinite plate. For a shorter bonding length, however, the bonding strength of the cavity array is monotonically decreased with the ratio of the bonding length to the cavity length. The critical ERR of 6.21J/㎡ has been measured from anodically bonded silicon-glass plates. A set of critical pressure curves has been generated for varying cavity array sizes, and a design method of the pressurized cavity array has been developed for the failure-free wafer-level packaging of MEMS devices.

IoT 적용을 위한 다종 소자 전자패키징 기술 (Heterogeneous Device Packaging Technology for the Internet of Things Applications)

  • 김사라은경
    • 마이크로전자및패키징학회지
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    • 제23권3호
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    • pp.1-6
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    • 2016
  • IoT 적용을 위해서는 다종 소자를 높은 connectivity 밀도로 집적화시키는 전자패키징 기술이 매우 중요하다. FOWLP 기술은 입출력 밀도가 높고, 소자의 집적화가 우수하고, 디자인 유연성이 우수하여, 최근 개발이 집중되고 있는 기술이다. 웨이퍼나 패널 기반의 FOWLP 기술은 초미세 피치 RDL 공정 기술과 몰딩 기술 개발이 최적화 되어야 할 것이다. 3D stacking 기술 특히 웨이퍼 본딩 후 TSV를 제조하는 방법(via after bonding)은 가격을 낮추면서 connectivity를 높이는데 매우 효과적이라 하겠다. 하지만 저온 웨이퍼 본딩이나 TSV etch stop 공정과 같이 아직 해결해야할 단위 공정들이 있다. Substrate 기술은 두께를 줄이고 가격을 낮추는 공정 개발이 계속 주목되겠지만, 칩과 PCB와의 통합설계(co-design)가 더욱 중요하게 될 것이다.

Epi poly를 이용한 MEMS 소자용 웨이퍼 단위의 진공 패키징에 대한 연구 (A Study on Wafer Level Vacuum Packaging using Epi poly for MEMS Applications)

  • 석선호;이병렬;전국진
    • 반도체디스플레이기술학회지
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    • 제1권1호
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    • pp.15-19
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    • 2002
  • A new vacuum packaging process in wafer level is developed for the surface micromachining devices using glass silicon anodic bonding technology. The inside pressure of the packaged device was measured indirectly by the quality factor of the mechanical resonator. The measured Q factor was about 5$\times10^4$ and the estimated inner pressure was about 1 mTorr. And it is also possible to change the inside pressure of the packaged devices from 2 Torr to 1 mTorr by varying the amount of the Ti gettering material. The long-term stability test is still on the way, but in initial characterization, the yield is about 80% and the vacuum degradation with time was not observed.

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