• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.2
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• pp.14-21
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• 1981

This paper describes a method for realizing RC active filters, by the use of the CGIC's In realizing the CGIC circuit, every element in the circuit is selected so as to minimize the effect of the non -ideal characteristic of operational amplifers, and an extra element is added to the, CGIC circuit to compensate the parasitic capacitances of the circuit. The CGIC s are utilized in the design of active filters using ladder embedding technique. The design procedure is presented in detail and the application is illustrated by the design of a band-pass filter of high order.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.403-406
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• 1987

CMOS operational amplifier is most useful building bloch in analog circuit. This paper represents the analysis and design method of CMOS OP AMP to use general purpose such as the A/D and D/A converter, PCM encoder and decoder etc. The required specifications is obtained by changing W/L ration of CMOS devices. The design procedure must be iterative in as much as it is almost impossible to relate all specifications simultaneously. This is performanced with IBM-PC XT by using SPICE(SIMULATION PROGRAM WITH INTEGRATED CIRCUIT EMPHASIS)program.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.4
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• pp.477-483
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• 1986

This paper studies the design of a CMOS operational amplifier for the switched capacitor filter by computer simulation, and presents the results of measurement. The operational amplifier composed of two stages is fabricated in the CMOS digital process. The DC voltage gain of the operational amplifier is 66dB, and the unity gain bandwidth is 833kHz. These results satisfy the performance requirmance requirements for the operational amplifier of the switched capacitor filter.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.1
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• pp.1-11
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• 2000

We propose a predistorter to compensate for nolinear distortion induced by a high power amplifier employed in multi carrier-code division multiple access (MC-CDMA) systems. The proposed scheme rests upon the fixed point iteration (FPI) associated with the contraction mapping theorem. Unlike the predistorter based on the FPI already presented by the authors in other literatures which operates on complex-valued modulation signals, the proposed predistorter in this paper deals with real-valued FPI on modulation signal amplitudes, resulting in less complexity. Simulation results on a BPSK-modulated, 64-subcarrier synchronous MC-CDMA baseband system with a traveling wave tube amplifier in the transmitter, indicate that the proposed predistorter achieves significant improvement in terms of bit error rate and total degradation over those without the predistorter. Moreover, the proposed predistorter outperforms the complex-valued counterpart, in particular, for small output back-off levels.

• Journal of the Korean Institute of Telematics and Electronics
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• v.13 no.6
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• pp.7-11
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• 1976

A voltage-stable negative resistance circuit with operational amplifier is proposed, and circuit analysis is given all the input voltage range. The behavior of the v-i characteristics in the nogative resistance region is devided into two causes, and top points in the input v-i characteristics of the circuit is analyzed with them. Experimental results of the v-i characteristics of the proposed circuit has a good linearity in the negative region with negative resistance, -86$\Omega$~-833$\Omega$ for the input voltage, $\pm$ 1~$\pm$ 5 colts. The v-i characteristics of the circuit in all the input voltage range is discussed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.7
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• pp.597-605
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• 2015

Negative impedance converter(NIC)-based non-Foster impedance matching is proposed for an electrically small antenna. The antenna considered in this work is a resistively loaded vee dipole(RVD) antenna, which has considerable reflection at the feed point because of its large negative input reactance. The non-Foster matching circuit built near the feed point consists of two-stage NIC circuit and a capacitor connected between the stages. The NIC is realized by using operational amplifiers(op-amps) and resistors. The circuit is designed by considering of the input impedance according to the finite open-loop gain of the practical NICs. The stability test of the impedance-matched RVD antenna is performed. The non- Foster matching circuit is implemented with the RVD antenna. The measured impedance demonstrates that the proposed non-Foster matching circuit effectively reduces the input reactance of the RVD antenna.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1303-1310
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• 2016

In this paper, electrocardiogram (ECG) analog front end with supply voltage of 0.5V has been designed and verified by measurements of fabricated chip. ECG is composed of instrument amplifier, 6th order gm-C low pass filter and variable gain amplifier. The instrument amplifier is designed to have gain of 34.8dB and the 6th order gm-C low pass filter is designed to obtain the cutoff frequency of 400Hz. The operational transconductance amplifier of the low pass filter utilizes body-driven differential input stage for low voltage operation. The variable gain amplifier is designed to have gain of 6.1~26.4dB. The electrocardiogram analog front end are fabricated in TSMC $0.18{\mu}m$ CMOS process with chip size of $858{\mu}m{\times}580{\mu}m$. Measurements of the fabricated chip is done not to saturate the gain of ECG by changing the external resistor and measured gain of 28.7dB and cutoff frequency of 0.5 - 630Hz are obtained using the supply voltage of 0.5V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.4
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• pp.669-678
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• 1994

This paper presents a new data predistortion technique with memory to compensate for the nonlinearities of high-power amplifiers (HPA`s) in digital radio systems employing QAM signal formats. In contrast with the conventional data predistortion technique which is designed to reduce nonlinearity of memoryless HPA`s, the proposed technique in this paper compensates not only for nonlinear warping of the signal constellation but also for clustering of the signal points caused by transmitter pulse sharping filter with memory. A practical implementation method which can reduce the size of memory at the predistortion stage is described by utilizing symmetry of QAM constellation format and Modulo-4 operation.

• Korean Journal of Optics and Photonics
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• v.23 no.4
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• pp.143-146
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• 2012

All-optical data extraction, one of the key technologies for all-optical computing and optical communication to perform add-drop, packet switching, and data reset, etc., is experimentally demonstrated by using cross-gain modulation (XGM) of semiconductor optical amplifiers (SOAs). Also, all-optical data extraction based on numerical simulation is performed by using the VPI simulation tool. In this paper, the suggested optical system based on SOAs shows the potential for high speed, and highly integrable and low power optical data computing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.4C
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• pp.403-413
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• 2009

We compare three predistortion methods to prevent signal distortion and spectral re-growth due to the high PAPR (peak-to-average ratio) of OFDM signal and the non-linearity of high-power amplifiers. The three predistortion methods are pth order inverse, indirect learning architecture and look up table. The pth order inverse and indirect learning architecture methods requires less memory and has a fast convergence because these methods use a polynomial model that has a small number of coefficients. Nevertheless the convergence is fast due to the small number of coefficients and the simple computation that excludes manipulation of complex numbers by separate compensation for the magnitude and phase. The look up table method is easy to implement due to simple computation but has the disadvantage that large memory is required. Computer simulation result reveals that indirect learning architecture shows the best performance though the gain is less than 1 dB at $BER\;=\;10^{-4}$ for 64-QAM. The three predistorters are adaptive to the amplifier aging and environmental changes, and can be selected to the requirements for implementation.