• Title/Summary/Keyword: 어레이 설계

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Design and Analysis of a 2-digit-serial systolic multiplier for GF($2^m$) (GF($2^m$)상에서 2-디지트 시리얼 시스톨릭 곱셈기 설계 및 분석)

  • 김기원;이건직;유기영
    • Proceedings of the Korean Information Science Society Conference
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    • 2000.10a
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    • pp.605-607
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    • 2000
  • 본 논문에서는 유한 필드 GF(2m)상에서 모듈러 곱셈 A(x)B(x) mod p(x)를 수행하는 2-디지트 시리얼 (2-digit-serial) 시스톨릭 어레이 구조인 곱셈기를 제안하였다. LSB-first 곱셈 알고리즘을 분석한 후 2-디지트 시리얼 형태의 자료의존 그래프(data dependency graph, 이하 DG)를 생성하여 시스톨릭 어레이를 설계하였다. 제안한 구조는 정규적이고 서로 반대 방향으로 진행하는 에지들이 없다. 그래서 VLSI 구현에 적합하다. 제안한 2-디지트 시리얼 곱셈기는 비트-패러럴(bit-parallel) 곱셈기 보다는 적은 하드웨어를 사용하며 비트-시리얼(bit-serial) 곱셈기 보다는 빠르다. 본 논문에서 제안한 2-디지트 시리얼 시스톨릭 곱셈기는 기존의 같은 종류의 곱셈기 보다 처리기의 최대 지연 시간이 적다. 그러므로 전체 시스톨릭 곱셈기의 처리시간을 향상시킬 수 있다.

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A Study on the Implementation of Hopfield Model using Array Processor (어레이 프로세서를 이용한 홉필드 모델의 구현에 관한 연구)

  • 홍봉화;이지영
    • Journal of the Korea Society of Computer and Information
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    • v.4 no.4
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    • pp.94-100
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    • 1999
  • This paper concerns the implementation of a digital neural network which performs the high speed operation of Hopfield model's arithmetic operation. It is also designed to use a look-up table and produce floating point arithmetic of nonlinear function with high speed operation. The arithmetic processing of Hopfleld is able to describe the matrix-vector operation, which is adaptable to design the array processor because of its recursive and iterative operation .The proposed method is expected to be applied to the field of real neural networks because of the realization of the current VLSI techniques.

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Design of the broadband and compact phase-calibrator for array microphones (어레이 마이크로폰용 광대역 소형 위상교정기의 설계)

  • Ju, Hyeong-Sick;Kim, Yang-Hann
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2004.11a
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    • pp.1032-1035
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    • 2004
  • Pressure distribution is measured by way microphones to identify noise sources in the space. For example, beam-forming method or acoustic holography use phase information to identify the source. Therefore, the phase is significant information to correctly identify the source position. However, due to the microphone characteristics and measuring systems, measured signals always have errors, which make the identification difficult. Therefore, phase calibration of microphones is needed. Duct and speaker systems are generally used as calibrators. Acoustic characteristics of the calibrator are, of course, functions of many Parameters of the system: i.e. duct size, frequency, and microphone spacing. In this paper, design parameters which effect on the performance and size of the calibrators are considered. Then the parameters would be applied to design and real product of the phase-calibrator.

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Fabrication of Semiconductor Gas Sensor Array and Explosive Gas-Sensing Characteristics (반도체 가스 센서 어레이의 제작 및 폭발성가스 감응 특성)

  • Lee, Dae-Sik;Jung, Ho-Yong;Ban Sang-Woo;Lee, Min-Ho;Huh, Jeung-Soo;Lee, Duk-Dong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.11
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    • pp.9-17
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    • 2000
  • A sensor array with 10 discrete sensors integrated on a substrate was developed for discriminating the kinds and quantities of explosive gases. The sensor array consisted of 10 oxide semiconductor gas sensors with $SnO_2$ as base material and had broad sensitivity to specific gas. The sensor array was designed with uniform thermal distribution and had also high sensitivity and reproductivity to low gas concentration through nano-sized sensing materials with different additives. By using the sensitivity signal of the sensor array at $400^{\circ}C$, we could reliably discriminate the kinds and quantities of explosive gases like butane, propane and methane under the lower explosion limit through the principal component analysis (PCA) method.

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Micro Sensor Away and its Application to Recognizing Explosive Gases (마이크로 센서 어레이 제작 및 폭발성 가스 인식으로의 응용)

  • 이대식;이덕동
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.1
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    • pp.11-19
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    • 2003
  • A micro sensor array with 4 discrete sensors integrated on a microhotplate was developed for identifying the kinds and quantities of explosive gases. The sensor array consisited of four tin oxide-based thin films with the high and broad sensitivity to the tested explosive gases and uniform thermal distribution on the plate. The microhotplate, using silicon substrate with N/O/N membrane, dangling in air by Al bonding wires, and controlling the thickness by chemical mechanical process (CMP), has been designed and fabricated. By employing the sensitivity signal of the sensor array at 40$0^{\circ}C$, we could reliably classily the kinds and quantities of the explosive gases like butan, propane, LPG, and carbon monoxide within the range of threshold limit values (TLVs), employing principal component analysis (PCA).

Hardware Design of Enhanced Real-Time Sound Direction Estimation System (향상된 실시간 음원방향 인지 시스템의 하드웨어 설계)

  • Kim, Tae-Wan;Kim, Dong-Hoon;Chung, Yun-Mo
    • The Journal of the Acoustical Society of Korea
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    • v.30 no.3
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    • pp.115-122
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    • 2011
  • In this paper, we present a method to estimate an accurate real-time sound source direction based on time delay of arrival by using generalized cross correlation with four cross-type microphones. In general, existing systems have two disadvantages such as system embedding limitation due to the necessity of data acquisition for signal processing from microphone input, and real-time processing difficulty because of the increased number of channels for sound direction estimation using DSP processors. To cope with these disadvantages, the system considered in this paper proposes hardware design for enhanced real-time processing using microphone array signal processing. An accurate direction estimation and its design time reduction is achieved by means of an efficient hardware design using spatial segmentation methods and verification techniques. Finally we develop a system which can be used for embedded systems using a sound codec and an FPGA chip. According to experimental results, the system gives much faster real-time processing time compared with either PC-based systems or the case with DSP processors.

A Design of CMOS 5GHz VCO using Series Varactor and Parallel Capacitor Banks for Small Kvco Gain (작은 Kvco 게인를 위한 직렬 바랙터와 병렬 캐패시터 뱅크를 이용한 CMOS 5GHz VCO 설계)

  • Mi-Young Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.2
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    • pp.139-145
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    • 2024
  • This paper presents the design of a voltage controlled oscillator (VCO) which is one of the key building blocks in modern wireless communication systems with small VCO gain (Kvco) variation. To compensate conventional large Kvco variation, a series varactor bank has been added to the conventional LC-tank with parallel capacitor bank array. And also, in order to achieve excellent phase noise performance while maintaining wide tuning range, a mixed coarse/fine tuning scheme(series varactor array and parallel capacitor array) is chosen. The switched varactor array bank is controlled by the same digital code for switched capacitor array without additional digital circuits. For use at a low voltage of 1.2V, the proposed current reference circuit in this paper used a current reference circuit for safety with the common gate removed more safely. Implemented in a TSMC 0.13㎛ CMOS RF technology, the proposed VCO can be tuned from 4.4GH to 5.3GHz with the Kvco (VCO gain ) variation of less than 9.6%. While consuming 3.1mA from a 1.2V supply, the VCO has -120dBc/Hz phase noise at 1MHz offset from the carrier of the 5.3 GHz.

Efficient One-dimensional VLSI array using the Data reuse for Fractal Image Compression (데이터 재사용을 이용한 프랙탈 영상압축을 위한 효율적인 일차원 VLSI 어레이)

  • 이희진;이수진;우종호
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.05a
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    • pp.265-268
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    • 2001
  • In this paper, we designed one-dimensional VLSI array with high speed processing in Fractal image compression. fractal image compression algorithm partitions the original image into domain blocks and range blocks then compresses data using the self similarity of blocks. The image is partitioned into domain block with 50% overlapping. Domain block is reduced by averaging the original image to size of range block. VLSI array is trying to search the best matching between a range block and a large amount of domain blocks. Adjacent domain blocks are overlapped, so we can improve of each block's processing speed using the reuse of the overlapped data. In our experiment, proposed VLSI array has about 25% speed up by adding the least register, MUX, and DEMUX to the PE.

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