• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.8-14
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• 2008

A fully CMOS-integrated carbon nanotube (CNT) sensor array is proposed. After the sensor chip is fabricated in commercial CMOS process, the CNTs network is formed on the top of the fabricated sensor chip through the room-temperature post-CMOS processes. When the resistance of the CNT is changed by the chemical reaction, the read-out circuit in the chip measures the charging time of the $R_{CNT}$-Capacitor. finally the information of measured frequency is converted to a digital code. The CMOS sensor chip was fabricated by standard 0.18um technology and the size of the $8{\times}8$ sensor array is $2mm{\times}2mn$. We have carried out an experiment detecting the biochemical material, glutamate, using this sensor chip. From the experiment the CMOS sensor chip shows the feasibility of sensor for the simultaneous detection of the various target materials.

• Journal of Advanced Navigation Technology
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• v.21 no.5
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• pp.466-471
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• 2017

SOTM is a device for the satellite communication on the move. Many studies are conducted on microstrip, waveguide and array antenna for the low profile of the SOTM's antenna. But those antennas have a problem that is difficult to adjust the polarization, and for that reason we have studied the parabolic antenna structure. The general form of parabolic reflector structure is circular, but we used cut-off shape reflector by cutting the upper and lower reflector for low profile antenna. Accordingly, this results in the decrease of reflector area which causes reduced gain and G/T ratio. In order to solve this problem, we have transformed and designed the sub reflector for improving the efficiency and gain of the cut- off shape parabolic antenna.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.125-129
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• 2010

This paper introduces an X-band microstrip patch array antenna that can be suitable for an energy saving system. The presented patch antenna comprises with 2-element linear array. The antenna is simulated using CST MWS and manufactured using FR-4(h=1.0mm, ${\varepsilon}r=4.4$). The estimated bandwidth, gain and beamwidth are 4%(VSWR$\leq$2), 6.3dBi and about 60o in elevation and 15o in azimuth, respectively. The antenna is fabricated and optimized based on the simulation result and installed on the backside of the sensor circuit and measured. The measured bandwidth, gain and beamwidth are 7%(VSWR$\leq$2), 4.8dBi and about 55o(El)/15o(Az), respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.9
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• pp.2087-2092
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• 2015

Recently, use of the heat transferring machine and systems has been increasing in various industrial fields. A key technique for constructing such process is basically to measuring temperature directly to objects established on industrial plants. Particularly, a non-contact temperature measurement is very important to realize advanced heat transferring systems. This paper presents a new measurement methodology for temperature by using USN(ubiquitous sensor networks) technique including the microprocessor unit based ZigBee communication systems. This proposed system is made to be applied in monitoring systems for non-contact temperature measurement. We designed firmware based measurement systems whose main function is to save s series of temperature data sets and send it to main monitoring systems.

• Journal of IKEEE
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• v.23 no.3
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• pp.954-961
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• 2019

This paper suggests an advanced 8T SRAM which can operate properly in subthreshold voltage regime. The memory cell consists of symmetric 8 transistors, in which the latch storing data is controlled by a column-wise assistline. During the read, the data storage nodes are temporarily decoupled from the read path, thus eliminating the read disturbance. Additionally, the cell keeps the noise-vulnerable 'low' node close to the ground, thereby improving the dummy-read stability. In the write, the boosted wordline facilitates to change the contents of the memory bit. At 0.4 V supply, the advanced 8T cell achieves 65% higher dummy-read stability and 3.7 times better write-ability compared to the commercialized 8T cell. The proposed cell and circuit techniques have been verified in a 16-kbit SRAM array designed with an industrial 180-nm low-power CMOS process.

• Korean Journal of Optics and Photonics
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• v.24 no.1
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• pp.1-8
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• 2013

In this paper, we report design, fabrication and characterization of the WBRM (Wide Band Receiver Module) for LADAR (LAser Detection And Ranging) application. The WBRM has been designed and fabricated using self-made APD (Avalanche Photodiode) and TIA (Trans-impedance Amplifier). The APD and TIA chips have been integrated on 12-pin TO8 header using self-made ceramic submount and circuit. The WBRM module showed 450 ps of rise time, and corresponding 780 MHz bandwidth. Furthermore, it showed very low output noise less than 0.8 mV, and higher SNR than 15 for 150 nW of MDS(Minimum Detectable Signal). To the author's knowledge, this is the best performance of an optical receiver module for LIDAR fabricated by 200 um InGaAs APD.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.12
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• pp.11-19
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• 1999

Fractal image compression algorithm has been studied mostly not in the view of hardware but software. However, a general processor by software can't decode fractal compressed images in real-time. Therefore, it is necessary that we develop a fast dedicated hardware. However, design examples of dedicated hardware are very rare. In this paper, we designed a quadtree fractal-based compressed image decoder which can decode $256{\times}256$ gray-scale images in real-time and used two power-down methods. The first is a hardware-optimized simple post-processing, whose role is to remove block effect appeared after reconstruction, and which is easier to be implemented in hardware than non-2' exponents weighted average method used in conventional software implementation, lessens costs, and accelerates post-processing speed by about 69%. Therefore, we can expect that the method dissipates low power and low energy. The second is to design a power dissipation in the multiplier can be reduced by about 28% with respect to a general array multiplier which is known efficient for low power design in the size of 8 bits or smaller. Using the above two power-down methods, we designed decoder's core block in 3.3V, 1 poly 3 metal, $0.6{\mu}m$ CMOS technology.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.15 no.2
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• pp.111-118
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• 2016

This paper presents an X-band (9.375 GHz) $1{\times}2$ array microstrip antenna which is capable of active beam compensation for installation of an unmanned aerial vehicle (UAV). First of all, a basic $1{\times}2$ array microstrip antenna incorporated with wilkinson power divider was designed and performance of the array antenna was verified. Next, to verify beam steering performance of the designed array microstrip antenna, we fabricated a phase shifter, and the wilkinson power divider as module structure and measured characteristics of beam steering according to phase shifting. The main lobe is 0.6 dBi at $0^{\circ}$, and the side lobe decreased 18.8 dB. The reliable radiation pattern was achieved. Finally, an active beam steering microstrip array antenna attached with the phase shifter and the power divider on the back side of the antenna was designed and fabricated to install wing of UAV for compactness. The maximum gain is 0.1 dBi. Therefore, we obtained a basic antenna technology for compensating beam error according to wing deformation of an UAV installed array antennas.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.2 s.31
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• pp.59-66
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• 2004

This paper presents a novel fabrication process for a tapered hollow metallic microneedle array using backside exposure of SU-8, and analytic solutions of critical buckling of a tapered hollow microneedle. An SU-8 meta was formed on a Pyrex glass substrate and another SU-8 layer, which was spun on top of the SU-8 mesa, was exposed through the backside of the glass substrate. An array of SU-8 tapered pillar structures. with angles in the range of $3.1^{\circ}{\sim}5^{\circ}$ was formed on top of the SU-8 mesa. Conformal electrodeposition of metal was carried out followed by a mechanical polishing using a pianarizing polymeric layer. All organic layers were then removed to create a metallic hollow microneedle array with a fluidic reservoir on the backside. Both $200{\mu}m\;and\;400{\mu}m$ tall, 10 by 10 arrays of metallic microneedles with inner diameters of the tip in the range of $33.6{\sim}101\;{\mu}m$ and wall thickness of $10{\mu}m\;-\;20{\mu}m$ were fabricated. Analytic solutions of the critical buckling of arbitrary-angled truncated cone-shaped columns are also presented. It was found that a single $400{\mu}m$ tall hollow cylindrical microneedle made of electroplated nickel with a wall thickness of $20{\mu}m$, a tapered angle of $3.08^{\circ}$ and a tip inner diameter of $33.6{\mu}m$ has a critical buckling force of 1.8 N. This analytic solution can be used for square or rectangular cross-sectioned column structures with proper modifications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2369-2379
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• 2013

A CMOS x-ray line scan sensor which is used in both medical imaging and non-destructive diagnosis is designed. It has a pixel array of 512 columns ${\times}$ 4 rows and a built-in DC-DC converter. The pixel circuit is newly proposed to have three binning modes such as no binning, $2{\times}2$ binning, and $4{\times}4$ binning in order to select one of pixel sizes of $100{\mu}m$, $200{\mu}m$, and $400{\mu}m$. It is designed to output a fully differential image signal which is insensitive to power supply and input common mode noises. The layout size of the designed line scan sensor with a $0.18{\mu}m$ x-ray CMOS image sensor process is $51,304{\mu}m{\times}5,945{\mu}m$.