• the USERS
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• s.44
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• pp.74-79
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• 2005

• the USERS
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• s.43
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• pp.50-51
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• 2004

• Journal of the Korea Institute of Information Security & Cryptology
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• v.16 no.6
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• pp.15-24
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• 2006

Recently, the importance of the area efficient implementation of cryptographic algorithm for the portable device is increasing. Previous ARIA(Academy, Research Institute, Agency) implementation styles that usually concentrate upon speed, we not suitable for mobile devices in area and power aspects. Thus in this paper, we present an area efficient AR processor which use 32-bit architecture. Using new implementation technique of diffusion layer, the proposed processor has 11301 gates chip area. For 128-bit master key, the ARIA processor needs 87 clock cycles to generate initial round keys, n8 clock cycles to encrypt, and 256 clock cycles to decrypt a 128-bit block of data. Also the processor supports 192-bit and 256-bit master keys. These performances are 7% in area and 13% in speed improved results from previous cases.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.571-573
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• 2014

In today's technology streaming service's QoS technologiey is an issue. On quality video streaming service there are some technical issues exist, such as buffering. This submission is "Adaptive dual-streaming system design" which is for the integrity of the data streaming that is sent to TCP and UDP for faster transmission of data to the stream. This system provides real-time incoming video encoding in bitrate of h.264-based H through a process based on the video footage of several server and client-to-TCP and UDP via Adaptive providing streaming services in a network environment. This is an unspecified number of buffers in a network environment and continued through the minimization of various streaming for playback of videos and multimedia will be utilized in the field.