• Journal of Adhesion and Interface
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• v.25 no.2
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• pp.43-49
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• 2024

In recent years, the flexible organic synaptic transistor (FOST) has garnered attention for its flexibility, biocompatibility, ease of processability, and reduced complexity, which arise from using organic semiconductors as channel layers. These transistors can emulate the plasticity of the human brain with a simpler structure and lower fabrication costs compared to conventional inorganic synaptic devices. This makes them suitable for applications in next-generation wearable devices and soft robotics technologies. In FOST, the organic substrate is sensitive to the device preparation temperature; high-temperature treatment processes can cause thermal deformation of the organic substrate. Therefore, low-temperature solution-based processing techniques are essential for fabricating high-performance devices. This review summarizes the current research status of low-temperature solution-based FOST devices and presents the problems and challenges that need to be addressed.

• Electrical & Electronic Materials
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• v.10 no.8
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• pp.783-793
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• 1997

A VLSI implementation of a self-learning neural network integrated circuits using a linearity synapse transistor is investigated. The thickness dependence of oxide current density stress current transient current and channel current has been measured in oxides with thicknesses between 41 and 112 $\AA$, which have the channel width $\times$ length 10 $\times$1${\mu}{\textrm}{m}$, 10 $\times$ 0.3${\mu}{\textrm}{m}$ respectively. The transient current will affect data retention in synapse transistors and the stress current is used to estimate to fundamental limitations on oxide thicknesses. The synapse transistor has represented the neural states and the manipulation which gaves unipolar weights. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the drain source current.

• Electronics and Telecommunications Trends
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• v.29 no.2
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• pp.97-105
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• 2014

본고에서는 시냅스의 생물학적 기능과 이를 모방하는 멤리스터, 멤리스터와 CMOS(Complementary Metal-Oxide-Semiconductor) 트랜지스터의 하이브리드, 그리고 멤리스터 기반의 집적회로 구현에 관한 최신 연구개발 동향을 다루었다. 기억과 스위칭을 동시에 수행할 수 있는 시냅스 모방 멤리스터는 Moore의 법칙에 따른 집적도 한계의 도래시점을 지연시킬 수 있으며, 디지털 컴퓨팅의 한계를 극복하여 학습능력을 가지는 지능형 실시간 병렬처리 시스템을 구현할 수 있는 잠재력을 가지고 있다. 또한 멤리스터는 신경세포의 기능을 재해석하는 계기가 되어 뇌과학 발전에도 크게 기여할 것으로 예상된다. 저전력으로 구동하는 지능형 프로세서의 조기 등장을 위해서는 뇌 과학, 나노소재 및 소자기술, 집적회로 설계 및 공정기술, 뉴로컴퓨팅(neuro-computing) 등 다양한 분야의 융합전략이 요구된다.

• Journal of the Korean Institute of Intelligent Systems
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• v.24 no.5
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• pp.457-461
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• 2014

Using $0.18{\mu}m$ CMOS process silicon neuron circuit of the pulse type for modeling biological neurons, were designed in the semiconductor integrated circuit. Neuron circuiSt providing is formed by MOS switch for initializing the input terminal of the capacitor to the input current signal, a pulse signal and an amplifier stage for generating an output voltage signal. Synapse circuit that can convert the current signal output of the input voltage signal, using a bump circuit consisting of NMOS transistors and PMOS few. Configure a chain of neurons for verification of the neuron model that provides synaptic neurons and two are connected in series, were performed SPICE simulation. Result of simulation, it was confirmed the normal operation of the synaptic transmission characteristics of the signal generation of nerve cells.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.59-62
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• 2000

A VLSI implementation of a self-learning neural network integrated circuits using a linearity synapse transistor is investigated. The thickness dependence of oxide current density, stress current, transient current and channel current has been measured in oxides with thicknesses between 41 and 112 $\AA$, which have the channel width$\times$length 10$\times$1${\mu}{\textrm}{m}$ respectively. The transient current will affect data retention in synapse transistors and the stress current is used to estimate to fundamental limitations on oxide thicknesses. The synapse transistor has represented the neural states and the manipulation which gave unipolar weights. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the drain source current.

• Ceramist
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• v.21 no.2
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• pp.4-18
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• 2018

Lastly, neuromorphic computing chip has been extensively studied as the technology that directly mimics efficient calculation algorithm of human brain, enabling a next-generation intelligent hardware system with high speed and low power consumption. Three-terminal based synaptic transistor has relatively low integration density compared to the two-terminal type memristor, while its power consumption can be realized as being so low and its spike plasticity from synapse can be reliably implemented. Also, the strong electrical interaction between two or more synaptic spikes offers the advantage of more precise control of synaptic weights. In this review paper, the results of synaptic transistor mimicking synaptic behavior of the brain are classified according to the channel material, in order of silicon, organic semiconductor, oxide semiconductor, 1D CNT(carbon nanotube) and 2D van der Waals atomic layer present. At the same time, key technologies related to dielectrics and electrolytes introduced to express hysteresis and plasticity are discussed. In addition, we compared the essential electrical characteristics (EPSC, IPSC, PPF, STM, LTM, and STDP) required to implement synaptic transistors in common and the power consumption required for unit synapse operation. Generally, synaptic devices should be integrated with other peripheral circuits such as neurons. Demonstration of this neuromorphic system level needs the linearity of synapse resistance change, the symmetry between potentiation and depression, and multi-level resistance states. Finally, in order to be used as a practical neuromorphic applications, the long-term stability and reliability of the synapse device have to be essentially secured through the retention and the endurance cycling test related to the long-term memory characteristics.