• Proceedings of the Korean Information Science Society Conference
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• 2003.10a
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• pp.310-312
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• 2003

다중 쓰레드를 지원하는 실시간 운영체제 스케줄러의 time partitioning 속성을 프로세스 알제브라 언어인 ACSR을 이용하여 분석한다. 본 논문에서는 먼저 실시간 운영체제의 전반적인 스케줄러 동작에 대한 ACSR 모델을 작성하고, 이를 두 가지 시나리오에 대해 분석한다. 이러한 방법을 사용함으로써 실시간 시스템의 설계 및 구현 작업을 보다 쉽고 정확하게 수행할 수 있다.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.1
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• pp.73-77
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• 2007

In this paper, we propose a VLSI architecture of an LMS filter based on a Cyclo-static scheduler for fast computation of LMS filteing algorithm which is widely used in adptive filtering area. This process is composed of two steps: scheduling and circuit synthesis. The scheduling step accepts a fully specified flow graph(FSFG) as an input, and generates an optimal Cyclo-static schedule in the sense of the sampling rate, the number of processors, and the input-output delay. Then the generated schedule is transformed so that the number of communication edges between the processors. The circuit synthesis part translates the modified schedule into a complete circuit diagram by performing resource allocations. The VLSI layout generation can be performed easily by an existing silicon compiler.

• Journal of the Korea Society of Computer and Information
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• v.15 no.7
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• pp.1-10
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• 2010

The power of computational Grid resources can be utilized on users desktop by employing workflow managers. It also helps scientists to conveniently put together and run their own scientific workflows. Generally, stage-in, process and stage-out are serially executed and workflow systems help automate this process. However, as the data size is exponentially increasing and more and more scientific workflows require multiple processing steps to obtain the desired output, we argue that the data movement will possess high portion of overall running time. In this paper, we improved staging time and design a new scheduler where the system can execute concurrently as many jobs as possible. Our simulation study shows that 10% to 40% improvement in running time can be achieved through our approach.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.2
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• pp.228-234
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• 2006

This paper describes a systematic process which can generate a complete circuit specification efficiently for a given recursive DSP algorithm based on an optimal multiprocessor scheduler. The process is composed of two states: scheduling and circuit synthesis. The scheduling part accepts a fully specified flow graph(FSFG) as an input, and generates an optimal synchronous multiprocessor schedule. Then the circuit synthesis part translates the modified schedule into a complete circuit diagram including a control specification. The circuit diagram can be applied to a silicon compiler for VLSI layout generation. This paper illustrates the whole process with an example of a second order Gray-Market lattice filter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.8
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• pp.1827-1834
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• 2013

The existing PC-based desktop environment is being changed to a server-based virtual desktop environment due to various advantages such as security, mobility, and upgrade cost reduction. In this paper, a virtual computing lab service system which is applicable to the existing computer lab is designed and implemented using both an open source-based cloud computing platform and hypervisor. In addition, a node power scheduler is proposed in order to reduce power consumption in a server farm. The experimental results show that the power scheduler reduces power consumption considerably over the server farm without the power scheduler.

• Journal of KIISE:Information Networking
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• v.36 no.4
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• pp.351-359
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• 2009

A wireless MAC scheduler for CDMA2000 IxEV-DO that provides a high level of quality-of-service(QoS) for video-on-demand(VOD) applications while achieving a reasonable level of system throughput is proposed, The proposed scheduler that exists in the MAC layer utilizes the video data information that resides in the application layer such that it improves the QoS for VOD applications. We show by simulations that our approach is better than the previous scheduler which is also based on video traces for VBR videos that have high variability between video frames.

• Proceedings of the Korea Information Processing Society Conference
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• 2015.10a
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• pp.227-229
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• 2015

모든 사물에 인터넷이 연결되는 사물 인터넷(IoT: Internet of Things)시대가 열렸다. IoT 디바이스들을 연결하기 위해 클라우드 또한 더욱 관심이 높아지고 있다. IoT 디바이스를 연결한 클라우드는 작은 단위의 작업들을 다량으로 수행하게 된다. IoT 서비스에서 발생하는 작업들을 효율적으로 처리하기 위해서는 적합한 작업 스케줄링이 반드시 필요하다. 본 논문에서는 오픈소스 기반의 플랫폼인 오픈스택(OpenStack)에서 Filter 스케줄러와 Chance 스케줄러를 VM 개수에 따라 단위 시간동안 성능을 비교 분석한다. 이를 통해 오픈스택에서 IoT 서비스 사용자들을 위해 합리적인 스케줄러 방법을 도출해낼 수 있다

• Journal of Advanced Navigation Technology
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• v.21 no.1
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• pp.36-42
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• 2017

An airport surface movement scheduler using first-come first-served (FCFS) algorithm is developed to efficiently manage surface traffic in an airport. It is based on the previously developed traffic flow management scheduler. Link directionality and intersection processing, which are additional constraints for ground movement, are added to the scheduler. To verify each of additional constraints, several simulations were performed by making simple scenarios, and the results show that all constraints were satisfied. Also, a simulation was performed by making a scenario based on flight operation information system (FOIS) data which is real departure and arrival flight data of Jeju airport. To determine the practicality of the developed scheduler, we compare the actual average delay time with the average delay time calculated by the scheduler.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.373-376
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• 2003

This paper presents a new, three-dimensional round-robin scheduler that provides high throughput and fair across in an advanced input-queued packet switch using shared input buffers. We consider an architecture in which each input port group shares a common buffer and maintains a separate queue for each output, which is ratted the distributed common input buffer switch. In an NxN switch, our scheduler determines which queue in the total MxN input queues is served during each time slot where M is the number of common buffers. We suppose that each common buffer has K input ports and K output ports, and manages N output queues. The 3DRR scheduler determines MxK queues in every K(M) cycle when $K\geq$M (K$\leq$M), and provides massively parallel processing for the applications of high-speed switches with a large number of ports. The 3-DRR scheduler can be implemented using duplicated simple logic components allowing very high-speed implementation.

• Smart Media Journal
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• v.5 no.4
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• pp.18-25
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• 2016

Virtualized hardware resources provides efficiency in use and easy of management. Based on the benefits, virtualization techniques are used to build large server clusters and cloud systems. The performance of a virtualized system is significantly affected by the virtual machine scheduler. However, the existing virtual machine scheduler have a problem in that the I/O response is reduced in accordance with the scheduling delay becomes longer. In this paper, we introduce the Loan/Redemption mechanism of a virtual machine scheduler in order to improve the responsiveness to I/O events. The proposed scheme gives additional credits for to virtual machines and classifies the task characteristics of each virtual machine by analyzing the credit consumption pattern. When an I/O event arrives, the scheduling priority of a virtual machine is temporally increased based on the analysis. The evaluation based on the implementation shows that the proposed scheme improves the I/O response 60% and bandwidth of virtual machines 62% compared to those of the existing virtual machine scheduler.