• Proceedings of the Korean Society of Broadcast Engineers Conference
• /
• 2016.11a
• /
• pp.60-62
• /
• 2016

이동통신 시스템의 OFDM(Othogonal frequency division multiplexing) 신호는 큰 PAPR(Peak to Average Power Ratio)을 가지기 때문에 비선형 특성을 가지는 전력 증폭기의 효율 감소를 가져온다. 이러한 전력 증폭기의 비선형 특성을 개선하여 효율을 증가시키기 위해서 전력 증폭기의 역 특성을 가지는 디지털 전치 왜곡기가 이용된다. 본 논문에서는 제곱근 근사를 이용한 Look-up Table(LUT) 기반의 디지털 전치왜곡(Digital Pre-Distortion :DPD) 기법을 제안한다. 제안하는 방식은 복소 이득(Complex Gain) LUT 구조에서 입력신호의 크기를 구할 때, 기존의 테이블을 이용하여 제곱근 연산을 하는 방식보다 좋은 성능을 내면서 근사를 위한 테이블의 메모리를 필요로 하지 않는다. 또한 간단한 쉬프트 연산 등을 이용하므로 DSP 또는 MCU 기반의 DPD를 구현할 때 간단하게 구현 될 수 있다는 장점을 갖는다. 컴퓨터 모의실험을 통해 제안하는 제곱근 근사방식을 이용한 DPD와 기존의 방식을 사용한 DPD를 비교함으로써 제안하는 방식이 기존 방식보다 좋은 성능을 내면서도 보다 효율적으로 구현될 수 있음을 검증하였다.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.51 no.6
• /
• pp.110-116
• /
• 2014

Pattern matching algorithms are widely used in computer security systems such as computer networks, ubiquitous networks, sensor networks, and so on. However, the advances in information technology causes grow on the amount of data and increase on the computation complexity of pattern matching processes. Therefore, there is a strong demand for a novel high performance pattern matching algorithms. In light of this fact, this paper newly proposes a suffix tree based pattern matching algorithm. The suffix tree is constructed based on the suffix values of all patterns. Then, the shift nodes which informs how many characters can be skipped without matching operations are added to the suffix tree in order to boost matching performance. The proposed algorithm reduces memory usage on the suffix tree and the amount of matching operations by the shift nodes. From the performance evaluation, our algorithm achieved 24% performance gain compared with the traditional algorithm named as Wu-Manber.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.8
• /
• pp.34-41
• /
• 2002

This paper describes a scalable implementation method of a word-based RSA cryptoprocessor using pseudo carry look-ahead adder The basic organization of the modular multiplier consists of two layers of carry-save adders (CSA) and a reduced carry generation and Propagation scheme called the pseudo carry look-ahead adder for the high-speed final addition. The proposed modular multiplier does not need complicated shift and alignment blocks to generate the next word at each clock cycle. Therefore, the proposed architecture reduces the hardware resources and speeds up the modular computation. We implemented a single-chip 1024-bit RSA cryptoprocessor based on the word-based modular multiplier with 256 datapaths in 0.5${\mu}{\textrm}{m}$ SOG technology after verifying the proposed architectures using FPGA with PCI bus.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2004.05a
• /
• pp.731-734
• /
• 2004

본 논문은 입력영상의 화질 향상을 위하여 기존의 스트레칭 알고리즘을 이용하여 개선된 콘트라스트 알고리즘을 제안하였다. 입력영상의 픽셀(pixel)을 DR(Difference Range)의 범위에 따라 정해진 가중치를 적용하여 새로운 픽셀을 출력한다. 특별한 사용자 정의(User Define)없이 실시간적으로 화질을 개선할 수 있는 장점이 있다. 또한, 하드웨어 적인 측면에서 곱셈 과 나눗셈 연산을 배럴쉬프트(Barrel Shift)를 이용하여 하드웨어 복잡도를 감소 시켰다. 제안한 방식의 알고리즘의 검증을 위하여 C를 이용한 시각적 검증과 하드웨어 측면에서의 검증을 VHDL을 이용한 컴퓨터 시뮬레이션을 통해 확인하였다.

• Journal of Digital Contents Society
• /
• v.18 no.1
• /
• pp.71-77
• /
• 2017

Virtual advertisement is an advertising technique that using computer graphic in a media production such as a sports image for inserting product image, logo, advertising slogan, etc. Recently, the image insertion of virtual advertisement is actively spreading due to the satisfaction of technical element for the image insertion of virtual advertisement in sports advertisement by increasing of the image processing technology and the computing performance. In addition, image processing technology for automatic insertion has become an important research field in the virtual advertisement field. In this paper, we propose the method of extracting less-informative region by using image processing technique and machine learning to insert a virtual advertisement automatically in sports image. The proposed method analyzes the brightness level of image through the histogram and extracts the less-informative region using the machine learning method.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.5
• /
• pp.1155-1163
• /
• 2011

In this paper, we propose a new pre-processing algorithm applied to depth map to improve the coding efficiency. Now, 3DV/FTV group in the MPEG is working for standard of 3DVC(3D video coding), but compression method for depth map images are not confirmed yet. In the proposed algorithm, after dividing the histogram distribution of a given depth map by EM clustering method based on GMM, we classify the depth map into several layered images. Then, we apply different mean shift filter to each classified image according to the existence of background or foreground in it. In other words, we try to maximize the coding efficiency while keeping the boundary of each object and taking average operation toward inner field of the boundary. The experiments are performed with many test images and the results show that the proposed algorithm achieves bits reduction of 19% ~ 20% and computation time is also reduced.

• The Journal of the Acoustical Society of Korea
• /
• v.25 no.3
• /
• pp.113-120
• /
• 2006

This paper is concerned with a equalization technique for Orthogonal Frequency Division Multiplexing (OFDM) systems based on a block type pilot arrangement over slow fading channels. The bit rates obtained in underwater channels are relatively modest compared to some other communication channels such as cellular phones or indoor wireless systems. Consequently. the Doppler effect is the important parameter in tracking a channel. In case of a coherent demodulation scheme, the residual mean phase errors due to Doppler frequency may be fatal for the performance of the system. The equalizer could not solely handle mean Doppler shift. To account for the common Doppler effect a phase error tracking loop is used with the frequency equalizer. so that the rotation errors are avoided. Furthermore. simulations show that we can reduce the computational load of the tracking loop with negligible effect on performance.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.3
• /
• pp.636-644
• /
• 2015

This research aims to suggest methods to improve object tracking performance by combining CAM shift algorithm with 8-way search window, and reduce arithmetic operation by reducing the number of frame used for tracking. CAM shift has its adverse effect in tracking methods using signature color or having difficulty in tracking rapidly moving object. To resolve this, moving search window of CAM shift makes it possible to more accurately track high-speed moving object after finding object by conducting 8-way search by using information at a final successful timing point from a timing point missing tracking object. Moreover, hardware development led to increased unnecessary arithmetic operation by increasing the number of frame produced per second, which indicates efficiency can be enhanced by reducing the number of frame used in tracking to reduce unnecessary arithmetic operation.

• Journal of IKEEE
• /
• v.27 no.3
• /
• pp.251-257
• /
• 2023

In this paper, we propose a dual-structured self-attention method that improves the lack of regional features of the vision transformer's self-attention. Vision Transformers, which are more computationally efficient than convolutional neural networks in object classification, object segmentation, and video image recognition, lack the ability to extract regional features relatively. To solve this problem, many studies are conducted based on Windows or Shift Windows, but these methods weaken the advantages of self-attention-based transformers by increasing computational complexity using multiple levels of encoders. This paper proposes a dual-structure self-attention using self-attention and neighborhood network to improve locality inductive bias compared to the existing method. The neighborhood network for extracting local context information provides a much simpler computational complexity than the window structure. CIFAR-10 and CIFAR-100 were used to compare the performance of the proposed dual-structure self-attention transformer and the existing transformer, and the experiment showed improvements of 0.63% and 1.57% in Top-1 accuracy, respectively.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.42 no.1
• /
• pp.79-85
• /
• 2005

In this paper, low-power design and implementation techniques for IMT-2000 interpolation filter are proposed. Processor technique for DA(Distributed Arithmetic) filter and minimization technique for number of addition in CSD(Canonic Signed Digit) filter are utilized for low-power implementation. proposed filter structure consists of 3 blocks. In the first CSD coefficient block, every possible 4 bit CSD coefficients are calculated and stored. In second processor block, multiplication is done by MUX and addition processor in terms of filter coefficient. Finally, in third shift register block, multiplied values are output and stored in shift register. For IMT-2000 interpolation filter, proposed and conventional structures are implemented by using Verilog-HDL coding. Gate counts for the proposed structure is reduced to 31.57% comparison with those of the conventional one.