• Journal of the Microelectronics and Packaging Society
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• v.24 no.2
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• pp.23-27
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• 2017

This paper proposes an approach to predict the reliability of high temperature heaters by identifying their primary failure modes and mechanisms in the field. Test specimens were designed to have the equivalent stress conditions with the high temperature heaters in the field in order to examine the effect of stress conditions on the solder joint failures. There failures often result from cracking due to intermetallic compound (IMC) or void formation within a solder joint. Aging tests have been performed by exposing the test specimens to a temperature of $170^{\circ}C$ in order to reproduce solder joint failures in the field. During the test, changes in IMC formation were investigated by scanning electron microscopy (SEM) on the cross-sections of the test specimens, while changes in void formation were monitored both by resistance spectroscopy and by micro-computed tomography (microCT), alternately. The test results demonstrated the void volume within the solder increased as the time at the high temperature increased. Also, the phase shift of high frequency resistance was found to have high correlation with the void volume. These results implied the failure of high temperature heaters can be non-destructively predicted based on the correlation.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.81-88
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• 2019

In this study, the effects of graphene oxide (GO) addition on electromigration (EM) lifetime of Sn-3.0Ag-0.5Cu Pb-free solder joint between a ball grid array (BGA) package and printed circuit board (PCB) were investigated. After as-bonded, $(Cu,Ni)_6Sn_5$ intermetallic compound (IMC) was formed at the interface of package side finished with electroplated Ni/Au, while $Cu_6Sn_5$ IMC was formed at the interface of OSP-treated PCB side. Mean time to failure of solder joint without GO solder joint under $130^{\circ}C$ with a current density of $1.0{\times}10^3A/cm^2$ was 189.9 hrs and that with GO was 367.1 hrs. EM open failure was occurred at the interface of PCB side with smaller pad diameter than that of package side due to Cu consumption by electrons flow. Meanwhile, we observed that the added GO was distributed at the interface between $Cu_6Sn_5$ IMC and solder. Therefore, we assumed that EM reliability of solder joint with GO was superior to that of without GO by suppressing the Cu diffusion at current crowding regions.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.4
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• pp.1-8
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• 2003

Thermo-mechanical behavior of a ceramic ball grid array (CBGA) package assembly are characterized by high sensitive moire interferometry. Moir fringe patterns are recorded and analyzed at various temperatures in a temperature cycle. Thermal-history dependent analyses of global and local deformations are presented, and bending deformation (warpage) of the package and shear strain in the rightmost solder ball are discussed. A significant non-linear global behavior is documented due to stress relaxation at high temperature. Analysis of the solder interconnections reveals that inelastic deformation accumulates on only eutectic solder fillet region at high temperatures.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.1
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• pp.1-6
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• 2004

The requirements for harsh environment electronic controllers in automotive applications have been steadily becoming more and more stringent. Electronic substrate technologists have been responding to this challenge effectively in an effort to meet the performance, reliability and cost requirements. An effect of the plasma cleaning at the ECM(Engine Control Module) alumina substrate and the intermetallic compound layer between Sn-37wt%Pb solder and pad joints after reflow soldering has been studied. Organic residual carbon layer was removed by the substrate plasma cleaning. So the interfacial adhesive strength was enhanced. As a result of AFM measurement, conductor pad roughness were increased from 304 nm to 330 nm. $Cu_6/Sn_5$ formed during initial reflow process at the interface between TiWN/Cu pad and solder grew by the succeeding reflow process, so the grains became coarse. A cellular-shaped $Ag_3Sn$ was observed at the interface between Ag-Pd conductor pad and solder. The diameters of the $Ag_3Sn$ grains ranged from about 0.1∼0.6 $\mu\textrm{m}$. And a needle-shaped was also observed at the inside of the solder.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.1 s.38
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• pp.63-72
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• 2006

Mobile products, such as cellular phones, PDA and notebook, are subjected to many different mechanical loads, which include bending, twisting, impact shock and vibration. In this study, a cyclic bending test of the BGA package was performed to evaluate the fatigue life. Special bending tester, which was suitable for electronic package, was developed using an electromagnetic actuator. A nonlinear finite element model was used to simulate the mechanical bending deformation of solder joint in BGA packages. The fatigue life of lead-free (95.5Sn4.0Ag0.5Cu) solder joints was compared with that of lead-contained (63Sn37Pb). When the applied load to the specimen is small, the lead-free solder has longer fatigue life than lead-contained solder. The fatigue crack is initialized at the exterior solder joints and is propagated into the inner solder joints.

• Proceedings of the KWS Conference
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• 2010.05a
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• pp.75-75
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• 2010

3D 패키징 기술은 전기소자의 소형화, 고용량화, 저전력화, 높은 신뢰성등의 요구와 함께 그 중요성이 대두대고 있다. 이러한 3D 패키징의 연결방법은 와이어 본딩 또는 플립칩등의 기존의 방법에서 TSV(Through Silicon Via)를 이용하여 적층하는 방법이 주목받고 있다. TSV는 기존의 와이어 본딩과 비교하여 고집적도, 빠른 신호전달, 낮은 전력소비 등의 장점을 가지고 있어 많은 연구가 진행되고 있다. TSV의 세부 공정 중 비아필링(Via filling)기술은 I/O수 증가와 미세피치화에 따른 비아(Via) 직경의 감소 및 종횡비(Via Aspect Ratio)증가로 인해 기존 필링 공정으로는 한계가 있다. 기존의 비아 홀(Via hole)에 금속을 필링하기 위한 방법으로 전기도금법이 많이 사용되고 있으나, 전기도금법은 전기도금액 조성, 첨가제의 종류, 전류밀도, 전류모드 등에 따라 결과물에 큰 차이가 발생되어, 최적공정조건의 도출이 어렵다. 또한 20um이하의 비아직경과 높은 종횡비로 인하여 충진시 void형성등의 문제점이 발생하기도 한다. 본 연구에서는 용융솔더와 진공을 이용하여 비아를 필링시켰다. 이 방법은 관통된 비아가 형성된 웨이퍼 양단에 압력차를 주어, 작은 직경을 갖는 비아 홀의 표면장력을 극복하고, 용융상태의 솔더가 관통된 비아 홀 내부로 필링되는 방법이다. 관통 비아홀이 형성 된 웨이퍼 위에 솔더페이스트를 $250^{\circ}C$이상 온도를 가해 용융상태로 만든 후 웨이퍼 하부에 진공을 형성하여 필링하는 방법과 용융솔더를 노즐을 통하여 위쪽으로 유동시켜 그 위에 비아홀이 형성된 웨이퍼를 접촉하고 웨이퍼 상부에 진공을 형성하여 필링하는 방법으로 실험을 각각 실시하였다. 이 때, 웨이퍼 두께는 100um이하이며 홀 직경은 20, 30um, 웨이퍼 상부와 하부의 진공차는 약 0.02~0.08Mpa, 진공 유지시간은 1~3s로 실시하여 최적 조건을 고찰하였다. 각 조건에 따른 필링 후 단면을 전자현미경(FE-SEM)을 통해 관찰하였다. 실험 결과 0.04Mpa 이상에서 1s내의 시간에 모든 비아홀이 기공(Void)없이 완벽하게 필링되는 것을 관찰하였으며 이 결과는 기존의 방법에 비하여 공정시간을 감소시켜 생산성이 대폭 향상 될 수 있는 방법임을 확인하였다.

• Proceedings of the KWS Conference
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• 2010.05a
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• pp.76-76
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• 2010

무연솔더 재료를 자동차 전장품에 적용하기 위해서는 고온환경에 대한 내구성 및 진동 인자에 대한 영향을 고려해야한다. 특히, ELV(End of Life Vehicles) 지침이 개정됨에 따라 고온용 무연솔더 재료에 대한 재평가가 반드시 필요한 시점이다. 이에 대해 본연구에서는 현재 상용화 된 Pb-free솔더의 재료들 중 총 4종의 Solder을 선정하여 자동차 환경에 부합하는 진동조건하에서 시험해보았다. 그리고 미세조직의 특성, 접합부 형성시의 기계적 강도 및 접합부의 신뢰성을 평가하여 보았다. 각각의 조성에 대한 CHIP type과 QFP type의 실장부품을 준비하였으며, 각각의 조성별로 솔더 페이스트로 Daisy Chain PCB에 접합하여 조성에 따른 비교 데이터를 구축할 수 있었다. 리플로우 공정후 초기의 미세조직 및 전당강도, 저항값을 측정하여 진동시험에 따른 데이터와 비교하였다. 주파수는 10Hz~1,000Hz였으며, 진동가속도는 $29.4m/s^2$, 20시간의 랜덤진동이 적용되는 동안 챔버내의 온도는 상온으로 유지되었다. 진동시험과 이에 따른 저항측정을 통하여 진동 주파수와 시간에 따른 실장 부품이 받는 진동 영향과 실시간 저항값을 측정하였으며, 이때의 미세조직 비교를 통해 진동특성을 평가하였다. 진동 주파수에 따른 저항값의 변화가 있었으며, 진동전후 전단강도에도 영향을 주었다. QFP type에서는 SAC105가 진동에 가장 취약하였으며, CHIP type에서는 SACX0307이 진동에 가장 취약하였다.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.4
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• pp.1-10
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• 2001

Chip-on-glass(COG) mounting of area array electronic packages was attempted by heating the rear surface of a contact pad film deposited on a glass substrate. The pads consisted of an adhesion (i.e. Cr or Ti) and a top coating layer(i.e. Ni or Cu) were healed by the UV laser beam transmitted through the glass substrate. The lather energy absorbed on the pad raised the temperature of a solder ball which is in physical contact with the pad, and formed a reflowed solder bump. The effects of the adhesion and top coating layer on the laser reflow soldering were studied by measuring temperature profile of the ball during the laser heating process. The results were discussed based on the measurement of reflectivity of the adhesion layer. In addition, the microstructures of solder bumps and their mechanical properties were examined.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.4 s.37
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• pp.281-287
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• 2005

in-situ electromigration test was carried out for edge drift lines of eutectic SnPb solder using Scanning Electron Microscopy (SEM). The electromigration test for the eutectic SnPb solder sample was conducted at temperature of $90^{\circ}C$ and the current density of $6{\times}10^4A/cm^2$. Edge drift at cathode and hillock growth at anode were observed in-situ in a SEM chamber during electromigration test. It was clearly revealed that eutectic SnPb solder lines has an incubation stage before void formation during electromigration test, which seemed to be related to the void nucleation stage of flip chip solder electromigration behaviors.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.2
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• pp.61-67
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• 2003

The interfacial reaction between ultra-small 58Bi-42Sn solder and Au/Ni/Ti under bump metallurgy (UBM) for ultra-fine flip chip application was investigated. The ultra-small 58Bi-42Sn solder bump, about $46{\mu}m$ in diameter, was fabricated by using the lift-off method and reflowed using the rapid thermal annealing (RTA) system. The intermetallic compounds were characterized using a secondary electron microscopy (SEM), an energy dispersive spectroscopy (EDS), and an x-ray diffractometer (XRD). The faceted and polygonal intermetallic compounds were found in the Bi-Sn solder bumps on $Au(0.1{\mu}m)/Ni/Ti$ UBM and they were indentified as $(Au_xBi_yNi_{1-x-y})Sn_2$ Phase. The intermetallic compounds grown from the $Au(0.1{\mu}m)/Ni/Ti$ UBMinterface were dispersed in the solder bump.