• Title/Summary/Keyword: 셀 버퍼

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A Low Power Voltage Controlled Oscillator with Bandwidth Extension Scheme (대역폭 증가 기법을 사용한 저전력 전압 제어 발진기)

  • Lee, Won-Young;Lee, Gye-Min
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.1
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    • pp.69-74
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    • 2021
  • This paper introduces a low-power voltage-controlled oscillator(VCO) with filters that consist of resistors and capacitors. The proposed VCO contains a 5-stage current mode buffer, and each buffer cell has a resistor-capacitor filter that connects input and output terminals. The filter adds a zero to the buffer cell. Because the zero moves the oscillation condition to high frequencies, the proposed VCO can generate a high frequency clock with low power consumption. The proposed circuit has been designed with 0.18 ㎛ CMOS process. The power consumption is 9.83 mW at 2.7 GHz. The proposed VCO shows 3.64 pJ/Hz in our simulation study, whereas the conventional circuit shows 4.79 pJ/Hz, indicating that our VCO achieves 24% reduction in power consumption.

SLC Buffer Performance Improvement using Page Overwriting Method in TLC NAND Flash-based Storage Devices (TLC 낸드 플래시기반 저장 장치에서 페이지 중복쓰기 기법을 이용한 SLC 버퍼 성능향상 연구)

  • Won, Samkyu;Chung, Eui-Young
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.1
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    • pp.36-42
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    • 2016
  • In multi-level-cell based storage devices, TLC NAND has been employed solid state drive due to cost effectiveness. Since TLC has slow performance and low endurance compared with MLC, TLC based storage has adopted SLC buffer scheme to improve performance. To improve SLC buffer scheme, this paper proposes page overwriting method in SLC block. This method provides data updates without erase operation within a limited number. When SLC buffer area is filled up, FTL should execute copying valid pages and erasing it. The proposed method reduces erase counts by 50% or more compared with previous SLC buffer scheme. Simulation results show that the proposed SLC buffer overwrite method achieves 2 times write performance improvement.

A CICQ Switch Architecture Using Blocking Avoidance & Virtual Threshold Scheme for QoS Guaranteed Multicast Service (QoS가 보장된 멀티캐스트 서버스를 위한 Blocking Avoidance 셀 할당 기법과 Virtual Threshold 기법을 이용한 CICQ 스위치 구조)

  • Kim, Kyung-Min;Jung, Hyun-Duk;Lee, Jai-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.2B
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    • pp.120-130
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    • 2011
  • Recently the multicast based contents transmission is rapidly increasing due to the various multimedia services and the importance of switching technology to handle it is increasing as a consequence. Though the CICQ architecture has advantages that reduction of HoL blocking probability and simple scheduling using cross point buffer, it has disadvantage that the processing rate of multicast traffic can be significantly degraded corresponds to the traffic load increment. Several schemes have been proposed to solve this problem however they still can't provide enough processing ratio for multicast traffic. Therefore this paper proposes the BA cell assignment scheme and the VT scheme, and the processing rate of multicast traffic can be guaranteed by reducing the HoL blocking probability of multicast traffic and reservation of cross point buffer. Also simulation results verify that using the proposed scheme, the QoS of multicast service can be improved.

FPGA Design of Open-Loop Frame Prediction Processor for Scalable Video Coding (스케일러블 비디오 코딩을 위한 Open-Loop 프레임 예측 프로세서의 FPGA 설계)

  • Seo Young-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.5C
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    • pp.534-539
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    • 2006
  • In this paper, we propose a new frame prediction filtering technique and a hardware(H/W) architecture for scalable video coding. We try to evaluate MCTF(motion compensated temporal filtering) and hierarchical B-picture which are a technique for eliminate correlation between video frames. Since the techniques correspond to non-causal system in time, these have fundamental defects which are long latency time and large size of frame buffer. We propose a new architecture to be efficiently implemented by reconfiguring non-causal system to causal system. We use the property of a repetitive arithmetic and propose a new frame prediction filtering cell(FPFC). By expanding FPFC we reconfigure the whole arithmetic architecture. After the operational sequence of arithmetic is analyzed in detail and the causality is imposed to implement in hardware, the unit cell is optimized. A new FPFC kernel was organized as simple as possible by repeatedly arranging the unit cells and a FPFC processor is realized for scalable video coding.

A Study on Multicast ATM Switch with Tandem Crosspoints (탠덤크로스포인터 멀티캐스트 ATM 스위치 연구)

  • Ryul, Kim-Hong
    • Journal of the Korea Society of Computer and Information
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    • v.11 no.1 s.39
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    • pp.157-165
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    • 2006
  • This paper proposes a new output-buffered multicast ATM switch with tandem crosspoints switching fabric, named the MTCOS(Multicast Tandem Crosspoint Output-buffered Switch). The MTCOS consists of multiple simple crosspoint switch fabrics, named TCSF(Tandem Crosspoint Switch Fabric) , and concentrated output buffers for efficient multicasting. The TCSF resolves the cell delay deviation problem which the self-routing crossbar switches inherently have. Further, it offers multiple concurrent pathes from one input to multiple output ports. It also provides multi-channel switching by easy software configuration and has several desirable characteristics such as scalability, high Performance, and modularity. A shared traffic concentration and output queuing strategies of the MTCOS results in lower cell loss as well as lower cell delay time over a wide range of multicast traffic. Furthermore, it has lower hardware complexity than that of the SCOQ and Knockout multicast switch to achieve the same Knockout concentration rate as the conventional switches. It is shown that the proposed switch can be easily applied to design high performance for any multicast traffic by analytic analysis and computer simulation.

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Determination of the Impact Fee Zone Based on the Grid Analysis of Population Increase (인구증가 분석격자의 공간정보를 이용한 기반시설 부담구역 설정방안)

  • Choei, Nae-Young
    • Journal of the Korean Association of Geographic Information Studies
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    • v.12 no.4
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    • pp.74-83
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    • 2009
  • In September 2008, the Korean government has legally pronounced criteria to designate the Impact Fee Zone on the basis of the population increase rate. Taking the Dongtan Newtown in Hwasung City as the case, the study tries a grid analysis method to figure out the cells that exceed the legal population increase rate criteria. The study then performs scenario analyses that try to envelope the cells into spatially contiguous groups based on their degrees of stepwise adjacency either by the cell buffer or the cell distance standards. By overlapping the selected cell groups over the actual land-use map for the vicinity, it is found that the selected areas reasonably coincide with the blocks of the high population density in the Newtown.

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Priority Control Using Cell and Windows Counter in ATM Switchs (ATM 교환기에서 셀 및 윈도우 카운터를 이용한 우선순위 제어)

  • Kim Byun-Gon;Seo Hae-Young;Jang Ting-Ting;Park Ki-Hong;Han Cheol-Min;Kim Nam-Hee
    • The Journal of the Korea Contents Association
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    • v.6 no.3
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    • pp.1-11
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    • 2006
  • With the improvement of information telecommunication technology, the various service in broadband integrated services digital networks have a wide range of delay, delay jitter and cell loss probability requirements according to traffic specification. Therefore, the design of appropriate control schemes that can satisfy the cell loss, delay requirements with various traffic specification for B-ISDN is an extremely important challenging problem. In this paper, we propose a priority control scheme using a window counter and a cell counter per each type of class. In the proposed priority control scheme, for satisfying required service quality, we performed the priority control scheme using the delay/loss factors obtained by comparing window counter with cell counter. The performance of proposed control scheme is estimated by computer simulation. In the results of simulation, we verified that the proposed method satisfied per class requirements as the results showed that cell loss probability has a order of video, data, voice and delay time has a order of video, voice and data.

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Resource Allocation Scheme for Macro-Femtocell Overlaid LTE-Advanced Networks (매크로-펨토셀 중첩 LTE-Advanced 망을 위한 자원 할당 방안)

  • Lee, Jong-Chan;Lee, Moon-Ho
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.12
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    • pp.81-89
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    • 2014
  • The heterogeneous LTE-Advanced networks comprising a macrocell and femtocells can provide an efficient solution not only to extend macrocell coverage but also to deal with packet traffics increasing explosively within macrocells. Efficient resource management schemes are necessary to maintain the QoS requirements of versatile multimedia applications in LTE-Advanced networks because their service-continuity may be defected by some delay and information loss. In this paper, we propose a resource allocation method for the heterogeneous LTE-Advancedl networks overlaid with femtocells. Performances are analyzed by simulation.

Cell Scheduling Algorithm for Internet Service over ATM Networks (ATM 망에서 인터넷 서비스를 위한 셀 스케줄링 알고리즘)

  • Cho, Hae-Seong
    • The Journal of the Korea Contents Association
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    • v.7 no.12
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    • pp.238-244
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    • 2007
  • Guaranteed Frame Rate(GFR), recently approved by the ATM Forum, expects to become an important service category to efficiently support TCP/IP traffic in ATM networks. The GFR service not only guarantees a minimum service rate at the frame level, but also supports a fair share of available bandwidth. We proposed new scheduling scheme for the GFR service. Proposed scheme provides priority to VCs and high priority to a VC which have more untagged cells in buffer. High priority VCs have much more serviced than low priority. Proposed scheme can provide MCR(minimum cell rate) guarantee and fair sharing to GFR VCs. Computer simulation results show that proposed scheduling scheme provide a much better performance in TCP goodput and fairness than previous scheme.

Satellite Battery Cell Voltage Monitor System Using a Conventional Differential Amplifier (종래의 차동증폭기를 사용한 인공위성 배터리 셀 전압 감시 시스템)

  • Koo, Ja-Chun;Choi, Jae-Dong;Choi, Seong-Bong
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.33 no.2
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    • pp.113-118
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    • 2005
  • This paper shows a satellite battery cell voltage monitor system to make differential voltage measurements when one or both measurement points are beyond voltage range allowed by a conventional differential amplifier. This system is particularly useful for monitoring the individual cell voltage of series-connected cells that constitute a rechargeable satellite battery in which some cell voltages must be measured in the presence of high common mode voltage.