• Title/Summary/Keyword: 셀 배치

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3GPP Standardization Activity for Small Cell Enhancements (3GPP 소형 셀 향상 표준화 기술 동향)

  • Baek, S.K.;Ko, Y.J.;Ahn, J.Y.;Song, P.J.
    • Electronics and Telecommunications Trends
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    • v.28 no.6
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    • pp.86-98
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    • 2013
  • 최근 다양한 형태의 스마트 기기 출현과 대중적 보급으로 고속 데이터 전송에 대한 수요가 나날이 증가하고 있어 소형셀 기술에 대한 이동통신 사업자들의 관심이 높다. 이에 데이터 요구량이 많은 위치에 소형 셀을 다층으로 밀집 배치하고 매크로 기지국 및 소형 셀 기지국의 밀접한 협력을 통해 무선 네트워크의 용량을 증가시키기 위한 기술들에 대한 요구가 높아지고 있다. 매크로 셀과 소형 셀이 다층으로 배치된 구조에서 고려해 볼 수 있는 요소기술들은 단말의 다중 노드 연결, 효율적인 이동성 보장, 효율적인 셀/이동단말 발견, 이종 듀플렉스캐리어 집성, 셀 간 간섭 관리 등이며, 본 논문에서는 이들을 기반으로 최근 3GPP에서 활발히 논의되고 있는 LTE 소형셀 향상 표준화 동향에 대해 기술한다.

A New Placement Algorithm for Gate Array (새로운 게이트 어레이 배치 알고리듬)

  • Kang, Kyung-Ik;Chong, Jong-Wha
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.5
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    • pp.117-126
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    • 1989
  • In this paper, a new placement algorithm for gate array lay out design is proposed. The proposed algorithm can treat the variable-sized macrocells and by considering the I/Q pad locations, the routing between I/Q pads and the internal region of a chip can be automated effectively. The algorithm is composed of 3 parts. which are initial partitioning, initial placement and placement improvement. In the initial placement phase, a given circuit is partitioned into 5 sub-circuits, by clustering method with considers connectivities of cells not only with I/Q pads but also with related partitioned groups is used repeatedly to assign a unique position to each cell. In the placement improvement phase, the concept of probabilistic wiring density is introduced, and cell moving algorithm is proposed to make the density in a chip even.

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Effective Global Placement Technique Using Quadratic Programming (Quadratic Programming을 이용한 효과적인 광역배치 기법)

  • Kim Dong-Hyun;Hur Sung-Woo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.6 s.348
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    • pp.23-29
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    • 2006
  • In this paper, we propose an effective global placement technique using quadratic programming(QP). In order to resolve cell congestion problem which is a drawback of QP based placement techniques, additional force and grid pre-warping technique are used. We devised a new density function for evaluating proper additional force which depends on density. Grid pre-warping technique relocates cells over entire area according to the relative ordering between coordinates of cells. Using the additional force obtained by the new density function and applying the pre-warping technique iteratively we obtained a well-distributed global placement. Mongrel which is a middle-down methodology based placer takes such a good global placement as an initial placement and produces a final detailed placement. Experimental results show that proposed technique outperforms the FM algorithm based global placement and are comparable with the well-known leading placers, FengShui, Dragon.

An Extended Interleaving Technique for Detailed Placement (상세배치를 위한 확장된 인터리빙 기법)

  • Oh Eun-Kyung;Hur Sung-Woo
    • Journal of KIISE:Computer Systems and Theory
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    • v.33 no.8
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    • pp.514-523
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    • 2006
  • In this paper we propose an extended interleaving technique to improve a detailed placement. The existing row-based interleaving technique allows cells to move only within a row and it can be applied when there is no space between cells. The proposed extended-interleaving technique releases such constraints so that cells can move along with a vertical line parallel to a y-axis and space between cells is properly handled. Converged detailed-placements by a mature CAD tool have been improved by the proposed interleaving technique by 9.5% on average in half-perimeter wire length.

System-Level Simulation for Efficient Displacement of Base Station Antennas for CDMA Uplink System in Urban Microcells (도심 마이크로셀에서 CDMA 시스템을 위한 효율적인 기지국 배치를 위한 모의실험)

  • Min, Seung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.5A
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    • pp.517-525
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    • 2008
  • In this paper, we cary out system level simulations to investigate the effect of cell shape(i.e., different base station displacements in the two directions defined by the street grid) on minimizing transmitter power, interference power, and blocking probability for CDMA system in urban microcellular environments. In urban microcell, path loss to the base station depends on the orientation of the street where the mobile is located. Interference from mobile stations to the base station in the reference cell is considered up to second tier. The wrap around method is used to include the second tier interference with realistic computational complexity without reducing the accuracy of interference calculations. The investigation shows that the transmitter power, interference power, and blocking probability in a cell can be reduced by proper selection of the efficient cell shape.

Improved Global Placement Technique to Relieve Routing Congestion (배선 밀집도를 완화하기 위한 개선된 광역배치 기법)

  • Oh, Eun-Kyung;Hur, Sung-Woo
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.4
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    • pp.431-435
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    • 2008
  • Since previous work CDP(Congestion Driven Placement) [1] considers all possible directions to move every cell in nets which contribute highly to routing congestion, it consumes CPU time a lot. In this paper, we propose a faster global placement technique, so called ICDGP(Improved Congestion Driven Global Placement) to relieve the routing congestion. ICDGP uses the force-directed method to determine the target locations of the cells in the nets in the congested spots, and considers only to move the target location for each cell. If moving multiple cells simultaneously is considered better than moving each cell one by one it moves multiple cells simultaneously. By experimental results, ICDGP produces less congested placement than CDP does. Particularly, the CPU time is reduced by 36% on average.

Design and Control Problems of Manufacturing Cells (제조 셀의 설계 및 운용 문제)

  • 유형근
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.15 no.25
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    • pp.15-22
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    • 1992
  • 본 연구에서는 물류의 개선 및 생산율 향상을 통하여 전 생산시스템의 생산성을 향상시키기 위한 효율적인 제조셀의 설계 및 운용시에 고려하여야 할 요소를 고찰하였다. 효율적인 제조셀을 형성하는데 발생하는 문제점(부품/기계군 형성, 설비배치, 스태핑, 셀 일정계획 및 운용)을 해결하기 위하여 필요한 요소별 지침을 제시하였다. 그러나, 셀생산의 장점을 충분히 얻기 위해서는 이들 요소들은 종합적으로 고려하여야 한다.

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Mongrel : Global Placement with Hierarchical Partitioning (Mongrel : 계층적 분할 기법을 이용한 광역 배치)

  • 성영태;허성우
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.10a
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    • pp.742-744
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    • 2004
  • 본 논문에서는 표준 셀 배치기 Mongrel의 성능을 개선하기 위해 사용된 다양한 기법에 관해 살펴보고 top-down방식의 계층적 분할 기법을 이용한 광역 배치(Hierarchical Global Placement)를 제안한다. 계층적 분할 기법을 이용한 광역 배치는 RBLS(Relaxation Based Local Search) 기법과 더불어 Mongrel의 성능 개선에 결정적인 역할을 하고 있으며 분할 기법으로 hMETIS(클러스터링을 이용한 다단계 분할 기법)를 사용한다. 우리는 표준 벤치마크 회로를 이용한 실험을 통해 계층적 분할 기법을 이용한 광역 배치 기법이 안정적이면서 효율적인 배치 결과를 가져옴을 보인다.

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Efficient Global Placement Using Hierarchical Partitioning Technique and Relaxation Based Local Search (계층적 분할 기법과 완화된 국부 탐색 알고리즘을 이용한 효율적인 광역 배치)

  • Sung Young-Tae;Hur Sung-Woo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.61-70
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    • 2005
  • In this paper, we propose an efficient global placement algorithm which is an enhanced version of Hybrid Placer$^{[25]}$, a standard cell placement tool, which uses a middle-down approach. Combining techniques used in the well-known partitioner hMETIS and the RBLS(Relaxation Based Local Search) in Hybrid Placer improves the quality of global placements. Partitioning techniques of hMETIS is applied in a top-down manner and RBLS is used in each level of the top-down hierarchy to improve the global placement. The proposed new approach resolves the problem that Hybrid Placer seriously depends on initial placements and it speeds up without deteriorating the placement quality. Experimental results prove that solutions generated by the proposed method on the MCNC benchmarks are comparable to those by FengShui which is a well known placement tool. Compared to the results of the original Hybrid Placer, new method is 5 times faster on average and shows improvement on bigger circuits.