• Title/Summary/Keyword: 선택암호화

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A Design of adaptive method in realtime multimedia service (실시간 멀티미디어 서비스의 DRM적용방법 설계)

  • 권순홍;김기영;신용태
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.04a
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    • pp.481-483
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    • 2002
  • 인터넷 사용자의 폭발적 증가와 콘텐츠 제공업체의 범람은 지적재산권 보호에 관심을 갖게 하였다. 본 논문에서는 지적재산권을 보호할 수 있는 기밀성을 보장하는 키관리 시스템을 제안하고 실시간 데이터의 특성을 수용하여 효율적인 멀티미디어 전송을 보장할 수 있는 암호화 기법인 선택적 암호화 기법을 제안한다. 또한 제안한 기법을 바탕으로 멀티미디어 데이터 서비스에 적합한 DRM시스템 모델을 제안한다.

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Design of the RBC Algorithm using Shared Hardware Architecture (하드웨어 공유 구조를 이용한 RBC 알고리즘의 설계)

  • Park, Hyoung-Keun;Kim, Sun-Youb;Ra, Yu-Chan
    • Proceedings of the KAIS Fall Conference
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    • 2009.05a
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    • pp.624-627
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    • 2009
  • 본 논문에서는 차세대 블록 암호 시스템으로 선정되었으며 미연방정부의 표준으로 제정된 RBC(Rijndael Block Cipher) 알고리즘을 하드웨어로 구현하였다. 구현된 블록 암호 시스템은 임베디드 시스템에 적용이 가능하도록 암호화 블록과 복호화 블록을 따로 설계하지 않고 하드웨어를 공유하여 하나의 블록에서 선택에 따라 암호화와 복호화가 모두 이루어질 수 있도록 설계함으로써 하드웨어의 면적을 최소화하였다.

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Digital Hologram Encryption using Discrete Wavelet Packet Transform (이산 웨이블릿 패킷 변환을 이용한 디지털 홀로그램의 암호화)

  • Seo, Young-Ho;Choi, Hyun-Jun;Kim, Dong-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.11C
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    • pp.905-916
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    • 2008
  • In this paper, we propose a new method which estimates and encrypts significant component of digital hologram using discrete wavelet packet transform (DWPT). After analyzing the characteristics of digital hologram in spatial and frequency domain, the required information for ciphering digital hologram was extracted. Based on this information an ciphering method was proposed with wavelet transform and packetization of subbands. The proposed algorithm can encrypt digital hologram in various robust from selecting transform-level and energy threshold. From analyzing the encryption effect numerically and visually, the optimized parameter for encryption is presented. Without additional analyzing process, one can encrypt efficiently digital hologram using the proposed parameter. Although only 0.032% among total data is encrypted, the reconstructed object dose not identified. The paketization information of subbands and the cipher key can be used for the entire secret key.

Hardware Implementation of Chaotic System for Security of JPEG2000 (JPEG2000의 보안을 위한 카오스 시스템의 하드웨어 구현)

  • Seo Young-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.12C
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    • pp.1193-1200
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    • 2005
  • In this paper, we proposed an image hiding method which decreases the amount of calculation encrypting partial data rather than the whole image data using a discrete wavelet transform and a linear scalar quantization which have been adopted as the main technique in JPEG2000 standard and then implemented the proposed algorithm to hardware. A chaotic system was used instead of encryption algorithms to reduce further amount of calculation. It uses a method of random changing method using the chaotic system of the data in a selected subband. For ciphering the quantization index it uses a novel image encryption algorithm of cyclical shifting to the right or left direction and encrypts two quantization assignment method (Top-down coding and Reflection coding), made change of data less. The experiments have been performed with the proposed methods implemented in software for about 500 images. The hardware encryption system was synthesized to find the gate-level circuit with the Samsung $0.35{\mu}m$ Phantom-cell library and timing simulation was performed, which resulted in the stable operation in the frequency above 100MHz.

Design of an Optimal RSA Crypto-processor for Embedded Systems (내장형 시스템을 위한 최적화된 RSA 암호화 프로세서 설계)

  • 허석원;김문경;이용석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.4A
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    • pp.447-457
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    • 2004
  • This paper proposes a RSA crypto-processor for embedded systems. The architecture of the RSA crypto-processor should be used relying on Big Montgomery algorithm, and is supported by configurable bit size. The RSA crypto-processor includes a RSA control signal generator, an optimal Big Montgomery processor(adder, multiplier). We use diverse arithmetic unit (adder, multiplier) algorithm. After we compared the various results, we selected the optimal arithmetic unit which can be connected with ARM core-processor. The RSA crypto-processor was implemented with Verilog HDL with top-down methodology, and it was verified by C language and Cadence Verilog-XL. The verified models were synthesized with a Hynix 0.25${\mu}{\textrm}{m}$, CMOS standard cell library while using Synopsys Design Compiler. The RSA crypto-processor can operate at a clock speed of 51 MHz in this worst case conditions of 2.7V, 10$0^{\circ}C$ and has about 36,639 gates.

Conditional Access Control for Encrypted SVC Bitstream (암호화된 SVC 비트스트림에서 조건적 접근제어 방법)

  • Won Yong-Geun;Bae Tae-Meon;Ro Yong-Man
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.16 no.3
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    • pp.87-99
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    • 2006
  • In this paper, we propose a method of conditional access control for encrypted SVC(scalable video coding) bitstream. The main purpose of the proposition is to provide a SVC suitable encryption algorithm and a efficient method for conditional access control using encrypted SVC bitstream. We analyzed requirements for conditional access control of a SVC bitstream. And based on the analysis, we proposed encryption algorithm suitable for SVC bitstream and a method of conditional access control of the encryped bitstream. The proposed conditional access control for encrypted SVC bitstream is performed by bitsream extraction and selective decryption. We verified the usefulness of the proposed method through experiments.

A study of restricting read/write permission of the selecitve file from file encryption ransomeware (파일의 읽기/쓰기 권한 제한을 통한 암호화 랜섬웨어로부터 선택적 파일보호 연구)

  • Kim, Jae-hong;Na, Jung-chan
    • Proceedings of the Korea Information Processing Society Conference
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    • 2017.04a
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    • pp.234-237
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    • 2017
  • 정보화 사회가 도래함에 따라 정보를 가공, 처리 유통하는 활동이 주를 이루고 정보의 가치는 경제적 가치를 창출하는 요소로 연결됐다. 이와 맞물려 ICT(Information & Communication Technology) 산업이 발전함에 따라 정보를 디지털 데이터 형식으로 저장관리 한다. 이러한 이유로 디지털 정보를 노리는 악성 행위들이 디지털 세상에서 문제가 되고 있다. 그중 사용자의 동의 없이 컴퓨터에 불법으로 설치되어 사용자의 디지털 파일(정보)를 인질로 잡아 금전적인 요구를 하는 악성 프로그램인 랜섬웨어의 피해는 날로 증가하고 있다.[1]. 본 논문에서는 운영체제의 시스템 콜 후킹을 통한 읽기/쓰기 권한을 제한함으로써 다양한 종류의 랜섬웨어 중 파일 암호화 기반 랜섬웨어로부터 사용자가 선택적으로 파일을 보호할 수 있는 방안을 제시하려 한다.

A Study of Method for Partial Image Encryption using Selective Coordinate (선택적 좌표를 이용한 부분 이미지 암호화 기법 연구)

  • Han, Chang-Nam;Kim, Jung-Jae;Jun, Moon-Seog
    • Proceedings of the KAIS Fall Conference
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    • 2010.11a
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    • pp.235-238
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    • 2010
  • 멀티미디어 시대가 도래함에 따라 콘텐츠들이 인터넷을 통해 셀 수 없을 만큼 많은 양이 전송되어지고 있다. 하지만 콘텐츠를 전송할 때의 안전성과 보안성 및 저작권 문제 등은 아직도 보완해야 할 문제이다. 따라서 본 논문에서는 콘텐츠 중 이미지로 한정하여서 이 이미지의 부분의 좌표를 선택하여 그 부분만 암호화함으로써 이미지를 안전하게 보호할 수 있는 기법에 대해 연구하고자 한다.

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Ciphering Scheme and Hardware Implementation for MPEG-based Image/Video Security (DCT-기반 영상/비디오 보안을 위한 암호화 기법 및 하드웨어 구현)

  • Park Sung-Ho;Choi Hyun-Jun;Seo Young-Ho;Kim Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.2 s.302
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    • pp.27-36
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    • 2005
  • This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.

A Design of Online Execution Class and Encryption-based Copyright Protection Hybrid (온라인 실행 코드와 암호화 기반 불법 복제 방지 시스템의 융합설계)

  • Kim, Hee-Sun;Kim, Sung-Ryul
    • Proceedings of the Korean Information Science Society Conference
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    • 2012.06a
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    • pp.113-115
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    • 2012
  • 안드로이드 앱의 불법 복제를 방지하고자 기존에 온라인 실행(Online Execution Class: OEC) 또는 앱을 암호화된 상태로 배포하여 실행 시에 적법한 사용자만이 암호를 복호화하여 실행이 가능하도록 하는 방법들이 있다. 하지만 스마트폰이 저전력과 저사양인 점을 고려할 때, 위에 방법은 스마트폰의 보안을 보장할 수 있지만 성능 면에서 부담이 된다. 본 논문에서 OEC를 암호화하여 보안 수준을 높이고 개발자에게 보안 수준을 선택할 수 있게 하여 환경에 맞추어 안전을 유지할 수 있도록 시스템 설계를 제안한다.