• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.131-134
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• 2007

In this paper, we propose the 1D-CZP pattern for FPGA verification. The algorithm that was implemented by Verilog-HDL on FPGA board is verified before the chip is producted. Input through the external sensor might not be enough to verify the algorithm on FPGA board. Hence, both external input and internal input can lead the verification of the algorithm. This paper suggests the hardware implementation of compact 1D-CZP pattern that has the random input. It is useful to analyze the characteristics of the filter frequencies and organized as ROM Table which is efficient to Modulus operation.

• Journal of Internet Computing and Services
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• v.7 no.1
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• pp.151-164
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• 2006

The DCF of IEEE 802.11 standard coordinates transmissions onto the shared communication channel based on CSMA/CA protocol. Currently, 802,11 is the most widely deployed wireless LAN standard. In this paper, for 802.11-based wireless LAN we propose a service differentiation scheme adopting different contention window sizes and retransmission schemes for two different types of data packets and we present a Markov model for the state of a given station under a finite load traffic condition. We then derive an algorithm to find the transmission probability and the throughput. The proposed model is validated through simulation under various system settings.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.2A
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• pp.91-99
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• 2011

Several repeater systems are used to enhance the cell coverage to location such as shadow and rural areas in mobile systems. But the general RF repeater solutions are not suitable for high power outdoor environment because it has the weakness such as self oscillation problem With adoption of a adaptive digital filter technology, feedback interference cancellation repeater prevents oscillation by detecting and canceling the unwanted feedback signal between transmission and receiver antenna. In this paper, dual NLMS based interference cancellation method is proposed and the step size adaptation can be implemented by the estimation of the feedback channel Doppler frequency characteristics. The performance of the proposed algorithm is quantified via analysis and simulation for the static and multipath fading feedback channels.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.05a
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• pp.759-762
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• 2017

The proposed scheme is proposed secure transmission of fixed data and unstructured data among medical information transmitted in PACS. Unstructured data uses the AES encryption algorithm as sensitive data And transmitted using encrypted mosaic encryption techniques for the non-identification of medical images, which are regular data. In addition, we have experimented with increasing the key size for encryption. As a result, we did not notice any significant difference between 128 - bit size and 128 - key size even when encrypting the size of 196,256.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2017.05a
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• pp.945-948
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• 2017

A valve used in a high temperature and pressure condition for high-speed vehicle application was developed for fuel supply and cooling system. For weight reduction purpose, the size outline of valve was optimized based on its performance and operating environment. And the rigidity design was adopted by minimizing uses of sealing parts to prevent leakages. Also, A fluid analysis was performed to derive the optimized internal flow path design in consideration of minimized pressure drop. Finally, the valve performance was verified by installing the valve into the test equipment which enable to simulate endothermic fuel of high temperature in high-speed vehicle.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.828-831
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• 2005

In this paper we propose a method to detect human faces from color image using pupil-template matching. Face detection is done by three stages. (i)separating skin regions from non-skin regions; (ii)generating a face regions by application of the best-fit ellipse; (iii)detecting face by pupil-template. Detecting skin regions is based on a skin color model. we generate a gray scale image from original image by the skin model. The gray scale image is segmented to separated skin regions from non-skin regions. Face region is generated by application of the best-fit ellipse is computed on the base of moments. Generated face regions are matched by pupil-template. And we detection face.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.1
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• pp.89-95
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• 2006

Planning distributed manufacturing logistics is one of main issues in supply chain management. This paper proposes a hybrid heuristic approach for the Multi-Level, multi-item Capacitated Lot Sizing Problem (MLCLSP) in supply chain network. MLCLSP corresponds to a mixed integer programming (MIP) problem. With integer variable solutions determined by heuristic search, this MIP problem becomes linear program (LP). By repeatedly solving the relaxed MIP problems with a heuristic search method in a hybrid manner, this proposed approach allocates finite manufacturing resources fur each distributed facilities and generates feasible production plans. Meta heuristic search algorithm is presented to solve the MIP problems. The experimental test evaluates the computational performance under a variety of problem scenarios.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.493-496
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• 2010

This paper proposes an effective hardware scheme for thinning stage processing of a fingerprint identification algorithm based on minutiae with 40% cycle occupation of 32-bit RISC microprocessor. The thinning step is needed to be processed by hardware block, because it is performed repeatedly by processing the same operation using an image window masking method. It can reduce the burden of the system and improve speed. The hardware is implemented by HDL and simulated. The result is compared with a conventional one.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.2
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• pp.127-133
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• 2010

In the paper, reactorless high efficiency boost DC/DC converter for EV is proposed. In proposed converter, improves efficiency because decrease power loss when the switches are turned on/off using zero current switching (ZCS) at all switch of primary full bridge. By replacing reactance ingredients of L-C resonance circuit for ZCS with leakage inductance ingredients of high frequency transformer, it reduces system size and expense because of not add special reactor. For validity verification of proposed converter, in the paper implements simulation using PSIM and perform experiment by making 5KW DC/DC converter. In experimental results, efficiency of proposed converter conformed superiority.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.5_6
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• pp.279-287
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• 2004

This paper describes a processor architecture, named Dynamically Instruction Scheduled VLIW (DISVLIW). The DISVLIW Processor architecture is designed for dynamic scheduling VLIW instructions using dependency information. The DISVLIW instruction format is augmented to allow dependency bit vectors to be placed in the same VLIW word. The DISVLIW processor dynamically schedules each instruction in long instructions using functional unit and dynamic scheduler pairs. Features such as explicit parallelism, balanced scheduling effort, and dynamic scheduling of VLIW instructions can be used to provide a sound frustructure for supercomputing. We simulate the DISVLIW processor architecture and show that the DISVLIW processor performs significantly better than the VLIW processor for a wide range of cache sites and across numerical benchmark applications.