• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.226-230
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• 2000

In this paper, we implemented the QPSK demodulator with a CPLD chip, and examined the results. DD(Decision Directed)-Gardner algorithm is used for STR loop and Decision-Directed algorithm is used for CPR loop. The speed of the QPSK demodulator implemented in FLEX10K chip can be guaranteed approximately 2[Mbpsl] transmission speed. In practical designed by ASIC, the speed is faster than that of CPLD by 5-6 times.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.44 no.3
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• pp.266-273
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• 2016

In this paper, we propose the signal processing techniques for the command link receiver mounted to aircrafts flying at a high speed. In order to acquire the various information transmitted from ground through radio frequency links, the wide received signal range must be guaranteed as well as the carrier synchronization and symbol synchronization be performed correctly within short pulse sections. After the synchronization step, we should be able to achieve theoretical performance of the modulation and demodulation scheme applied as deciding bit and symbol at the time appointed. By test results, we make sure that the proposed signal processing techniques can be effectively applied command link receiver mounted to aircrafts.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.11a
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• pp.732-735
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• 2010

본 연구에서는 음악 데이터 베이스에서 노래의 특정 구간과 가장 유사한 구간을 검색하는 시스템을 제안한다. 제안된 시스템에서는 음악을 다차원 시계열 데이터로 간주하고, 음악의 조성 차이 및 템포(tempo) 차이를 고려한 음악의 유사도 계산 방법을 사용한다. 유사도 계산의 전처리 단계에서 조성 차이를 보정하고, 비트(beat)를 검출하며, 추출된 크로마그램(chromagram)을 검출된 비트와 동기화 하여 평균한다. 이후, 동적 시간 왜곡(DTW; dynamic time warping)을 사용하여 두 구간사이의 유사도를 계산한 후 계산된 유사도 순서로 정렬된 검색 결과를 출력한다. 사용자는 제안된 시스템을 사용하여 선택 구간 유사도 검색과 자동 유사 검색 결과로 도출된 구간 쌍을 검토하여 유사 구간을 보다 쉽게 찾을 수 있다.

• Journal of Broadcast Engineering
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• v.5 no.2
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• pp.176-187
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• 2000

MPEG-4 is a digital bit stream format and associated protocols for representing multimedia content consisting of natural and synthetic audio, video and object data. This paper describes an application where multiple audio/visual data stream are combined in MPEG-4 and transported via MPTG-2 transport streams(TS). Also, this paper describes how to convert MPEG-4 Over MPEG-2 TS bit streams into MP4 file which Is designed to contain the media information of an MPEG-4 presentation in a flexible, extensible format. MPEG-4 is presented in the form of audio-visual objects that are arranged into an audio-visual scene by means of a scene descriptor and is composed of the audio-visual objects by means of an object descriptor. These descriptor streams are not defined MPEG-2 TS. So. this paper focuses on handling of these descriptors and parsing TS streams to get MPEG-4 data. The MPEG-4 Over MPEG-2 TS to MP4 format converter is implemented in the demonstrated systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5C
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• pp.479-486
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• 2010

In this paper, we propose a novel low-complexity Alamouti coded orthogonal frequency division multiplexing (OFDM) scheme for asynchronous cooperative communications. Exploiting the combination of OFDM symbols at the source node and simple operations including sign change and complex product at the relay node, the proposed scheme can achieve cooperative diversity gain without use of time-reversion and shifting operations that the conventional scheme proposed by Li and Xia needs. In addition, by using the cyclic prefix (CP) removal and insertion operations at the relay node, the proposed scheme does not suffer from a considerable degradation of bit-error-rate (BER) performance even though perfect timing synchronization is not achieved at the relay node. From the simulation results, it is demonstrated that the BER performance of the proposed scheme is much superior to that of the conventional scheme in the presence of timing synchronization error at the relay node. It is also shown that the proposed scheme obtains two times higher diversity gain compared with the conventional scheme at the cost of half reduction in transmission efficiency.

• ETRI Journal
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• v.11 no.4
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• pp.105-118
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• 1989

HARP(High performance Architecture for RISC type Processor)는 고유의 명령어 세트, 데이터 타입, 메모리 입출력, 예외 처리 기능을갖는 32비트 VLSI 프로세서 구조이다. 마이크로 아키텍츄어는 설계된 구조를 기대할 수 있는최고 성능을 갖도록 구조(architecture)와 구현(implementation) 사이의 최적 모델링을 통해 정의되는 구조체로서 구조의 개념 설계를 구현의 실물 설계로 변환 시켜주는 조율(tuning)모델이다. HARP의 고유한 명령어 세트를 비롯한 구조적 기능들을 최적 구현 하기위해 32비트 크기의 명령어 입력 유니트(Instruction Fetch Unit), 데이터 입출력 유니트(Data I/O Unit), 명령어/데이터 처리유니트(Instruction/Data Processing Unit), 예외 상황 처리 유니트(Exception Processing Unit)등 4개 유니트가 설계되었으며 이들 4개 유니트의 동작을 최대 속도로 유지시키기 위해 각급 주요 설계 변수들이 시뮬레이션을 통해 최적화 되었다. 유효 채널길이 $0.7\mum$급 3층 메탈 배선의 HCMOS(High performance CMOS)공정 기술을 구현 기준 기술로 사용하여 50MHz외 동작 주파수에서 최대50 MIPS(Million Instructions Per Second)의 성능을 갖도록 3단계 파이프라인이 설계되었다. 단일 위상의 50MHz클럭 입력과 동기화된 명령어/데이터 입출력을 위해 액세스 타임 20nsec이내의 고속 메모리 입출력 구조가 시뮬레이션되었으며 설계된 마이크로 아키텍츄어를 이용하여 HARP구조의 기대된 최대 성능을 검증하였다.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.179-180
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• 2008

본 논문에서는, 고품질 AT-DMB 시스템을 위해서 각 계층 ES(Elementary Stream)을 MPEG-4 over PEG-2 시스템과 Eureka-147 DAB 시스템을 통해 서로 다른 채널로 전송한다. 계층별 전송으로 인한 시간 지연에 대처하여 수신 입력부에서는 각각의 계층으로 전송된 ES들이 동기화 되어 복호화 되도록 SVC의 계층적 비트스트림 구조와 적응적으로 동작되는 다중화 시스템 구조를 제작하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.18-24
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• 2012

This paper reports the test results of a 50MHz/s 10 bits DAC developed with $0.18{\mu}m$ CMOS process for the wireless sensor network application. The 10bits DAC, not likely a typical segmented type, has been designed as a current driving type with double step thermometer decoding architecture in which 10bits are divided into 6bits of MSB and 4bits of LSB. MSB 6bits are converted into 3 bits row thermal codes and 3 bits column thermal codes to control high current cells, and LSB 4 bits are also converted into thermal codes to control the lower current cells. The high and the lower current cells use the same cell size while a bias circuit has been designed to make the amount of lower unit current become 1/16 of high unit current. All thermal codes are synchronized with output latches to prevent glitches on the output signals. The test results show that the DAC consumes 4.3mA DC current with 3.3V DC supply for 2.2Vpp output at 50MHz clock. The linearity characteristics of DAC are the maximum SFDR of 62.02dB, maximum DNL of 0.37 LSB, and maximum INL of 0.67 LSB.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.5
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• pp.418-426
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• 2003

To show a retina shape and thickness on the computer monitor, a laser has been used in Scanning Laser Ophthalmoscope(SLO) equipment using the traveling difference. This method requires exact synchronous control of laser traveling in optic system to show a clear 3-dimensional image of retina To obtain this image, this exact synchronism is very important for making the perfect plane scanning. In this study, a high speed and synchronous control of the galvanometer to make 3-dimensional retina image is presented. For the more, deadbeat load torque observer is added to the PI controller for compensation of the position error arisen in the high speed control. As a result, the proposed control system has a robust and precise response against the load torque variation appeared in high speed control. A stability and usefulness are verified by the computer simulation and the experiment.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.6
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• pp.48-56
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• 2010

Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.