• Title/Summary/Keyword: 비트스트림

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Digital watermarking algorithm for authentication and detection of manipulated positions in MPEG-2 bit-stream (MPEG-2비트열에서의 인증 및 조작위치 검출을 위한 디지털 워터마킹 기법)

  • 박재연;임재혁;원치선
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.378-387
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    • 2003
  • Digital watermarking is the technique that embeds invisible signalsincluding owner identification information, specific code, or pattern into multimedia data such as image, video and audio. Watermarking techniques can be classified into two groups; robust watermarking and fragile(semi-fragile) watermarking. The main purpose of the robust watermarking is the protection of copyright, whereas fragile(semi-fragile) watermarking prevents image or video data from illegal modifications. To achieve this goal watermark should survive from unintentional modifications such as random noise or compression, but it should be fragile for malicious manipulations. In this paper, an invertible semi-fragile watermarkingalgorithm for authentication and detection of manipulated location in MPEG-2 bit-stream is proposed. The proposed algorithm embeds two kinds of watermarks, which are embedded into quantized DCT coefficients. So it can be applied directly to the compressed bit-stream. The first watermark is used for authentication of video data. The second one is used for detection of malicious manipulations. It can distinguish transcodingin bit-stream domain from malicious manipulation and detect the block-wise locations of manipulations in video data. Also, since the proposed algorithm has an invertible property, recovering original video data is possible if the watermarked video is authentic.

Per Packet Authentication Scheme Using One-bit in 802.11 Wireless LAN (802.11 무선랜에서 1 비트를 이용한 패킷 인증 방안)

  • Lee Sungryoul;Kang Jimyung;Moon hogun;Lee myungsoo;Kim Chong-Kwon
    • The KIPS Transactions:PartC
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    • v.12C no.4 s.100
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    • pp.465-472
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    • 2005
  • IEEE 802.11 wireless LAN technology is essential for wireless internet, next generation converged network and home network. But, it is certain that user's privacy must be provided to expand the applicable area in IEEE 802.11 WLAN. Recently, WEP and 802.11i security scheme can be used in MAC Layer. But with VPN technology which is applied to WLAN user, it means that suity mechanism is used redundantly. One bit authentication mechanism was already proposed to solve this redundancy. In this paper, we analyze problems of 1-bit Authentication mechanism which are failure of synchronization and waste of packet. And we propose new algorithm which synchronizes sender with receiver, at once, using duplicated-packet-count information. We show that our algorithm improves success probability of packet authentication up to $98\%$ and efficiency of authentication bit stream up to $97\%$.

An Efficient MAC Unit for High-Security RSA Cryptoprocessors (고비도 RSA 프로세서에 적용 가능한 효율적인 누적곱셈 연산기)

  • Moon, San-Gook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.06a
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    • pp.778-781
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    • 2007
  • RSA crypto-processors equipped with more than 1024 bits of key space handle the entire key stream in units of blocks. The RSA processor which will be the target design in this paper defines the length of the basic word as 128 bits, and uses an 256-bits register as the accumulator. For efficient execution of 128-bit multiplication, 32b*32b multiplier was designed and adopted and the results are stored in 8 separate 128-bit registers according to the status flag. In this paper, an efficient method to execute 128-bit MAC (multiplication and accumulation) operation is proposed. The suggested method pre-analyze the all possible cases so that the MAC unit can remove unnecessary calculations to speed up the execution. The proposed architecture protype of the MAC unit was automatically synthesized, and successfully operated at 20MHz, which will be the operation frequency in the target RSA processor.

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Design of an Efficient MAC Unit for RSA Cryptoprocessors (RSA 암호화 프로세서에 적용 가능한 효율적인 누적곱셈 연산기 설계)

  • Moon, Sang-Gook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.1
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    • pp.65-70
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    • 2008
  • RSA crypto-processors equipped with more than 1024 bits of key space handle the entire key stream in units of blocks. The RSA processor which will be the target design in this paper defines the length of the basic word as 128 bits, and uses an 256-bits register as the accumulator. For efficient execution of 128-bit multiplication, 32b${\times}$32b multiplier was designed and adopted and the results are stored in 8 separate 128-bit registers according to the status flag. In this paper, an efficient method to execute 128-bit MAC (multiplication and accumulation) operation is proposed. The suggested method pre-analyze the all possible cases so that the MAC unit can remove unnecessary calculations to speed up the execution. The proposed architecture prototype of the MAC unit was automatically synthesized, and successfully operated at 20MHz, which will be the operation frequency in the target RSA processor.

Bit-rate control of transcoder considering the activity and direction of motion vector (움직임 벡터의 활동성과 방향성을 고려한 트랜스 부호화기의 비트율 제어)

  • 구성조;장해원;황찬식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12C
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    • pp.1209-1216
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    • 2003
  • The transcoding is needed to modify the bit rate of the video bitstream in accordance with the bandwidth of a variety of channels in order to provide users with a realtime multimedia service and more stable and credible VOD(Video On Demand) service on various wire/wireless network. This paper suggests how to guarantee the video quality in the transcoding process, taking the activity and direction of the macroblock into consideration, thereby reducing the calculation. The threshold of the macroblock's activity and direction is applicable to the different videos, with the DCT coefficients from the intermediate data in the decoding process. Moreover, the suggested video transcoding algorism enables us to maintain the proper video quality and reduce the calculation through the video bit rate change experiment in H.263 environment.

Multi-stream Delivery Method of the Video Data Based on SPIHT Wavelet (SPIHT 웨이브릿 기반의 비디오 데이터의 멀티스트림 전송 기법)

  • 강경원;류권열;김기룡;문광석;김문수
    • Journal of the Institute of Convergence Signal Processing
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    • v.3 no.3
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    • pp.14-20
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    • 2002
  • In this paper, we proposed the compression technique of the video data using SPIHT(set partitioning in hierarchical trees) based on wavelet and the multi-stream delivery method for best-effort service as fully utilizing the clients bandwidth over the current Internet. The experiment shows that the proposed method provides about 1.5dB better picture quality without block effects than DCT(discrete consine transform) based coding schemes at the same bit rates because of using the wavelet video coder. In addition, this technique implements the multi-stream transmission based on TCP(transmission control protocol). Thus, it is provided with the best-efforts service which is robust to the network jitter problem, and maximally utilizes the bandwidth of the client's.

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An Improved ZS Algorithm for High-Speed Synchronous Stream Ciphers (고속 동기식 스트림 암호에서의 ZS 동기 방식 개선)

  • Lee, Hun-Jae
    • The KIPS Transactions:PartC
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    • v.9C no.3
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    • pp.307-312
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    • 2002
  • Among the various zero suppression (ZS) algorithms used in a for synchronous stream cipher system, a ZS-2 exhibits certain good properties, including the omission of the block synchronization, easy implementation, etc., yet also a weakness in channel error propagation. Accordingly, This paper proposes a new method by minimizing the bit-wide substitution in the substitution blocks of ZS-2 to improve the degenerated error property in a noisy channel. As a result, the proposed ZS-3 algorithm can decrease the mean error propagation by about 18.7% over that of ZS-2 at n=8.

Development of Stream Cipher using the AES (AES를 이용한 스트림 암호 개발)

  • Kim, Sung-Gi;Kim, Gil-Ho;Cho, Gyeong-Yeon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.11
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    • pp.972-981
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    • 2013
  • Future aspects of the has turned into a network centric warfare(NCW). Organically combined wired and wireless networks in a variety of cross-of-the-art combat power factor utilization of information and communication technology is a key element of NCW implementation. At used various information in the NCW must be the confidentiality and integrity excellent then quick situation assessment through reliability the real-time processing, which is the core of winning the war. In this paper, NCW is one of the key technologies of the implementation of 128-bit output stream cipher algorithm is proposed. AES-based stream cipher developed by applying modified OFB mode the confidentiality and integrity as well as hardware implementation to the security and real-time processing is superior.

Development of Subtitle Analyzer for European Digital Terrestrial Broadcasting Systems (유럽 디지털 지상파 방송 시스템(DVB-T)을 위한 서브타이틀 분석기 개발)

  • Song, Hyeong-Don;Noh, Si-Chan;Sonh, Seung-Il;Kim, In-Gi;Gang, Min-Gu;Im, Hwa-Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.528-531
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    • 2008
  • 서브타이틀 데이터는 비트맵으로 된 텍스트로 MPEG-2 전송 스트림형식으로 전송된다. 본 논문에서는 셋톱박스(SetTopBox)에 사용되는 서브타이틀 분석기를 구현하는데 필요한 표준 기술을 분석하고, 윈도우 환경에서 사용가능 한 응용프로그램을 구현하는 방법을 제안한다. 특히 DVB-T용으로 제한하여 디스플레이 크기는 표준인 $720{\times}576$이다. 실제 유럽에서 방송되던 스트림을 가지고 테스트해본 결과 성공적으로 처리함을 확인하였다.

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10Gbps Time-Division Multiplexer using SiGe HBT (SiGe HBT를 이용한 10Gbps 시분할 멀티플렉서 설계)

  • 이상흥;강진영;송민규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.1B
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    • pp.201-208
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    • 2000
  • In the transmitter of optical communication systems, a time-division multiplexer combines several parallel data streams into a single data stream with a high bit rate. In this paper, we design a 4:1 (4-channels) time-division multiplexer using SiGe HBT with emitter size of 2x8um2. The operation speed is 100bps, the rise and fall times of 20-80% are 34ps and 34ps, respectively and the dissipation of power is 1.50W.

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