• Journal of Advanced Navigation Technology
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• v.15 no.6
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• pp.1104-1110
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• 2011

The conventional semiconductor equipment has adopted SRAM module as the test pattern memory, which has a simple design and does not require refreshing. However, SRAM has its disadvantages as it takes up more space as its capacity becomes larger, making it difficult to meet the requirements of large memories and compact size. if DRAM is adopted as the semiconductor inspection equipment, it takes up less space and costs less than SRAM. However, DRAM is also disadvantageous because it requires the memory cell refresh, which is not suitable for the semiconductor examination equipments that require correct timing. Therefore, In this paper, we will proposed an algorithm for punctuality guarantee of memory-free inspection equipment using DDR2 SDRAM. And we will Developed memory controller using punctuality guarantee algorithm. As the results, show that when we adopt the DDR2 SDRAM, we can get the benefits of saving 13.5 times and 5.3 times in cost and space, respectively, compared to the SRAM.

• Korean Management Science Review
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• v.18 no.1
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• pp.1-13
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• 2001

Despite that the semiconductor industry plays an important role to our economy, it has abnormal industrial structure stressing too much on memory chips. Thus, it is essential for our corporate to develop nonmemory chips to obtain technological leadership in a highly competitive semiconductor market. In this study, we demonstrate how benefit/cost analysis using the Analytic Hierarchy process (AHP) can be used for the proper selection of nonmemory semiconductor chips: Microprocessor, ASIC, digital IC and Analogue IC. The final results show that ASIC is the most attractive chip to develop, followed by Analogue IC, digital IC and Microprocessor. This is Somewhat consistent with the information that we found with respect to the elements that were taken into consideration. Sensitivity analysis is also provided here.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.353-356
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• 2001

기존의 범용시스템과 대별되는 임베디드 시스템의 수요가 급증하면서 하드웨어부분의 중심축인 임베디드 프로세서에 대한 관심이 하루가 다르게 커지고 있다. 또한 사용자들이 작고 간편하면서도 기존의 범용시스템과 같은 기능들을 가지는 높은 수준의 성능을 요구하게 됨으로서 한 칩 안에 여러 가지 기능을 함께 구현하거나 시스템을 집적하는 시스템 칩의 상품화가 이루어지고 있는 추세이다. 날로 경쟁이 치열해저 가는 비메모리 설계 분야에서 누가 더욱 우수한 반도체 관련 IP를 확보하느냐가 승패의 관건이 될 것은 당연한 일이 되었다. 된 논문에서는 기존에 성능이 검증된 SPARC 아키텍처 V8을 근간으로 한 VHDL모델을 분석하고, 시뮬레이션을 통하여 그 기능을 검증하였으며, Synopsys FC2(FPGA Compiler 2)를 이용하여 로직 합성하였으며, 그 결과를 Xilinx VIRTEX 3000 FPGA를 이용하여 구현하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.4A
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• pp.301-309
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• 2002

In this paper, we propose the effective implementation of various nonlinear combiners using by PS-LFSR: m-parallel memoryless-nonlinear combiner, m-parallel memory-nonlinear combiner, m-parallel nonlinear filter function, and m-parallel clock-controlled function. Finally, we propose m-parallel LILI-128 stream cipher as an example of the parallel implementation, and we determine its cryptographic security and performance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.507-511
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• 2018

This paper proposes a method for system development for high speed (300MHz) test of system IC semiconductors. The high-speed test system proposes a high-speed test circuit interface and a PCB design method for noise reduction. This paper proposes evaluation items and procedures for verifying the performance of the developed system. System IC The development of high speed test systems will help optimize the development of domestic system IC test equipment.

• The Safety technology
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• no.190
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• pp.21-23
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• 2013

스테코(주)는 삼성의 최첨단 반도체 조립기술과 일본 TORAY의 베이스필름 기술의 전략적 제휴로, 1995년 설립된 LCD 구동 IC제조업체다. 응용제품으로 노트북PC, LCD, PDP TV, LCD모니터, 핸드폰 등의 액정 판넬을 구동시키는 반도체를 제조하고 있으며, LDI제품 Package 전문반도체 회사로는 세계 최고의 생산성과 기술력을 보유하고 있다는 평가를 받고 있다. 이곳은 18년의 LDI Package경험, 지속적인 연구개발 노력, 그리고 최고 수준의 품질로 비메모리 반도체 제품 분야에서는 전례를 찾기 힘든 경영성과를 달성했다. 2007년과 2008년에 국가생산성대상을 수상한 것이 이를 뒷받침한다. 이러한 기업성장의 원동력은 안전보건에서 찾을 수 있다. 2008년 산업보건 우수사례발표대회 금상, 2010년 무재해사업장 우수사례발표대회 은상, 2009년에는 제8회 대한민국안전대상에서 행정안전부장과의 영예를 안았다. 또한 그 시기 OHSAS18001 및 ISO 14001 인증도 취득하고, 최근에는 무재해 10배수라는 대기록을 달성하면서 명실상부한 최고의 아전기업을 자리 잡게 됐다. 이렇듯 스테코(주)는 빠른 시간 안에 기업반전과 안전보건이라는 두 마리 토끼를 모두 잡으면서 지역 산업현장의 모범이 되고 있는 사업장이다. 스테코(주)를 찾아가 기업발전의 토대가 되고 있는 안전보건활동이 어떻게 이뤄지고 있는지 살펴봤다.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2001.05a
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• pp.77-83
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• 2001

In recent years, the AES in North America and the NESSIE project in Europe have been in progress. Six proposals have been submitted to the NESSIE project including the LILI-128 by Simpson in Australia in the synchronous stream cipher category. These proposals tend towards a design with parallelism of the algorithms in order to facilitate speed-up. In this paper, we consider the PS-LFSR and propose the effective implementation of various nonlinear combiners: memoryless-nonlinear combiner, memory-nonlinear combiner, nonlinear filter function, and clock-controlled function. Finally, we propose m-parallel SUM-BSG and LILI-l28's parallel implementation as examples, and we determine their securities and performances.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.4
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• pp.859-867
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• 2010

In this paper, we propose some parallel structures of the word-based nonlinear combining functions in word-based stream cipher, high-speed versions of general (bit-based) nonlinear combining functions. Especially, we propose the high-speed structures of popular four kinds in word-based nonlinear combiners using by PS-WFSR (Parallel-Shifting or Parallel-Structured Word-based FSR): m-parallel word-based nonlinear combiner without memory, m-parallel word-based nonlinear combiner with memories, m-parallel word-based nonlinear filter function, and m-parallel word-based clock-controlled function. In addition, we propose an implementation example of the m-parallel word-based DRAGON stream cipher, and determine its cryptographic security and performance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.927-930
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• 2006

While Intel has been increasing its exclusive possession in the system IC semiconductor market, IBM, Sony, and Toshiba founded an alliance to develop the next entertainment multi-core processor, which is named CELL. Cell is designed upon the Power architecture and includes 8 SPE (Synergistic processor Element) cores for data handling, and supports SIMD architecture for optimal execution of multimedia, or game applications. Also, it includes expanded Power microarchitecture. In this paper, we analyzed and researched the Cell microprocessor, which is evaluated as the most powerful processor in this era.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.383-386
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• 2009

In this paper, we propose some parallel structures of the word-based nonlinear combine functions in word-based stream cipher, high-speed versions of general (bit-based) nonlinear combine functions. Especially, we propose the high-speed structures of popular three kinds in word-based nonlinear combiners using by PS-WFSR (Parallel-Shifting or Parallel-Structured Word-based FSR): m-parallel word-based nonlinear combiner without memory, m-parallel word-based nonlinear combiner with memories, and m-parallel word-based nonlinear filter function. Finally, we analyze its cryptographic security and performance.