• Journal of Satellite, Information and Communications
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• v.8 no.2
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• pp.94-98
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• 2013

A report of security problems and simultaneous operation limits of Standard tone currently used for FTS introduces the development of a next generation FTS. In this paper, BER performance by modulations and channel coding methods for EFTS are compared. Simulation results show that coherent modulations have better BER performance than noncoherent modulations. However the environments of a lunching vehicle may cause serious problems in achieving and maintaining synchronization and the increasing complexity of coherent systems also increases reliability problems. Therefore noncoherent systems are suitable for FTS even though BER performace of noncoherent systems is lower than coherent systems. Noncoherent DPSK has better BER performance than noncoherent CPFSK. However the PEP of noncoherent DPSK is 0.8dB higher than noncoherent CPFSK. Therefore a transmitter of noncoherent DPSK has more output power than noncoherent CPFSK. Convoltional code has better BER performance than RS code. However RS code has a tendency of steeply decreasing BER near the wanted $E_b/N_0$.

• Proceedings of the IEEK Conference
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• 2000.09a
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• pp.577-580
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• 2000

본 논문에서는 비동기식 Zipper 방식의 VDSL(Very High Blt-rate Digital Subscriber Line) 시스템에서 cyclic extension 을 최소화 하는 기법을 제안하고, 전형적인 전화채널 환경 하에서 제안된 방식의 성능을 분석한다. Zipper 방식에서는 각 DMT(discrete-multitone) 블록에cyclic prefix(CP) 와 cyclic suffix(CS)가 추가로 사용되는데, 여기서 CP 는 심볼간 간섭과 부채널간 간섭을 방지하기 위하여 삽입되며, CS는 upstream 과 downstream 부반송파간의 직교성을 유지하기 위하여 추가되어 near-end crosstalk (NEXT)을 방지한다. 이 방식이 동기식 Zipper 방식으로 CS에 의해 NEXT를 제거하기 위해서는 한 binder 내의 모든 송신단의 동기를 맞추어야 한다. 그러나 비동기식 Zipper 방식은 다른 송신단과의 동기가 맞지 않아 CS가 NEXT에 아무런 영향을 주지 못한다 본 논문에서는 CS를 사용하지 않는 비동기식 Zipper 방식의 VDSL 시스템을 제안한다. 컴퓨터 모의실험을 통하여 제안된 방식이 전형적인 채널환경 하에서 기존 Zipper 방식의 VDSL 시스템과 비교하여 비슷한 전송능력을 갖게 됨을 보인다.

• The Journal of the Acoustical Society of Korea
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• v.41 no.2
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• pp.159-165
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• 2022

In this paper, a frame synchronization structure for the Binary Phase Shift Keying (BPSK) modulation method in underwater acoustic communication was proposed. The proposed frame synchronization structure is largely divided into two. First, the approximate position and frequency offset of the frame are obtained by non-coherent correlation and sliding Fast Fourier Transform (FFT) method. Second, after compensating for the frequency error to the received signal, the exact position of the frame is obtained by coherent correlation method. Maritime experiments were conducted to confirm the performance of the 2-STEP frame synchronization structure. It was showed that the limitations of the non-coherent correlation and sliding FFT method can be verified when the power of the received signal was greatly reduced due to the channel characteristics. As a result, stable frame synchronization could be obtained by compensating for the frequency error and then using the coherent correlation method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.8
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• pp.1735-1740
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• 2005

SoC design integrates many IPs that operate at different frequencies and the use of the different clock for each IP makes the design the most effective one. An asynchronous FIFO is required as a kind of a buffer to connect IPs that are asynchronous. However, in many cases, asynchronous FIFO is designed improperly and the cost of the wrong design is high. In this paper, an asynchronous FIFO is designed to transfer data across asynchronous clock domains by using a valid bit scheme that eliminates the problem of the metastability and synchronization altogether. This FIFO architecture is described in HDL and synthesized to the Bate level to compare with other FIFO scheme. The subject mater of this paper is under patent pending.

• Electronics and Telecommunications Trends
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• v.24 no.6
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• pp.110-120
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• 2009

비동기식 회로는 전역 클록이 없이 모듈끼리의 핸드셰이크 프로토콜에 의해 데이터를 동기화하고, 전송하는 회로로 전역 클록에 기반한 동기식 회로에 비해 전역 클록으로 인한 문제점들, 예를 들면, 타이밍 종결 문제, 전력 소모 문제, 다중 클록 도메인 설계 문제 등에서 이점을 갖는다. 최근에는 이 두 가지 회로의 장점을 모아 서로 다른 클록에 기반한 비교적 작은 규모의 동기식 모듈을 기반으로 모듈끼리의 데이터 전송을 비동기식으로 수행하는 GALS 구조도 많이 연구되고 있다. 본 고에서는 이러한 비동기식 회로를 위한 설계 방식을 설명하기 위해 먼저, 비동기식 회로의 특성과 설계 동향, 설계 방식에 영향을 미치는 핸드셰이크 프로토콜 및 지연 모델을 소개한다. 그리고, 크게 세가지의 설계 방식을 간단한 예제를 통해 설명한다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.364-366
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• 2022

The web uses an asynchronous web method to provide various information having different processing speeds together. The asynchronous method has the advantage of being able to respond to other events even before the task is completed, but a typical crawler has difficulty collecting information provided asynchronously by collecting point-of-visit information on a web page. In addition, asynchronous web pages often do not change their web address even if the page content is changed, making it difficult to crawl. In this paper, we propose a web crawling algorithm considering asynchronous page movement by analyzing links in the web. With the proposed algorithm, it was possible to collect dictionary information on TTA terms that provide information asynchronously.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.1
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• pp.17-25
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• 2016

This paper proposes an ultra-low power design methodology for asynchronous circuits which combines with power switch structure used for reducing leakage current in the synchronous circuits. Compared to existing delay-insensitive asynchronous circuits such as static NCL and semi-static NCL, the proposed methodology provides the leakage power reduction in the NULL mode due to the high Vth of the power switches and the switching power reduction at the switching moment due to the smaller area even though it has a reasonable speed penalty. Therefore, it will become a low power design methodology required for IoT system design placing more value on power than speed. In this paper, the proposed methodology has been evaluated by a $4{\times}4$ multiplier designed using 0.11 um CMOS technology, and the simulation results have been compared to the conventional asynchronous circuits in terms of circuit delay, area, switching power and leakage power.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2000.05a
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• pp.173-181
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• 2000

본 논문에서는 비동기 방식 CDMA의 표준화 기관인 3GPP(3rd Generation Partnership Project) 규격에 의거 비동기 IMT-2000 역방향 링크의 Physical layer flatform simulation을 수행하여 차세대 이동통신의 성능 분석 및 파라메터를 도출하였다. 역방향 링크의 성능은 채널 환경과 데이터 전송율, 채널 코딩 기법, 변복조 방식 등에 의해 크게 좌우된다. 따라서, 광대역 채널 모델링과 ITU-R 평가 환경에 근거하여 데이터 전송율에 따른 시스템 성능과 채널 환경에 따른 시스템 성능, 터보 부호화에 따른 성능, 터보 인터리버 종류에 따른 성능 및 OCQPSK 변복조 방식에 따른 성능을 분석하여 비동기 방식 시스템의 기술적 근거 및 타당성을 제시하며 차세대 이동 통신 서비스의 전개시기에 적절한 연구로서 활용될 수 있는 자료를 제시하였다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.10
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• pp.43-48
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• 2010

In general, in order to reduce an initial cell searching time, W-CDMA systems adopt a three-step cell search scheme: slot synchronization, frame synchronization, and primary scrambling code identification. We consider the second step (frame synchronization), in which a coherent detection using P-SCH (primary synchronization channel) is possible. In this paper, we propose a new coherent detection scheme, where a first order recursive filter is used to enhance channel estimation performance. Computer simulation results indicate that the detection performance of the proposed scheme can be robust over large range of frequency offset.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.12
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• pp.1765-1767
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• 2016

Non-coherent UWB receivers are promising due to the low hardware complexity while the coherent receiver such as the rake receiver requires the complex hardware to estimate channel characteristics and get the synchronization. In this letter, the block coded modulation scheme as one of the most promising method is enhanced in terms of the performance. The performance enhancement is carried out by the modification of the block structure with unequal frame length for each pulse. Simulation results show that the proposed method has the performance enhancement by the transmission rate or bit error rate.