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Ryu, In-Ho;Lee, Woo-Choun;Bang, Jun-Ho;Cho, Hyun-Seob
- Journal of the Korea Academia-Industrial cooperation Society
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- v.9 no.5
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- pp.1172-1177
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- 2008
To compensate voltage error of the channel selecting filter, a current comparison type voltage tuning circuit is designed. Because the proposed current comparison type voltage tuning circuit is not need to attach another subcircuit, the chip size can be reduced, therefore the proposed circuit is very useful in the low voltage and low power channel filter. We used three channels including bluetooth communication system as application circuits of the proposed tuning circuit. As the results of HSPICE simulation using $0.18{\mu}m$ CMOS technology verify that the proposed tuning circuit respectively can be operated in $12{\mu}s$, $13{\mu}s$ and $15{\mu}s$ in three channel.
https://doi.org/10.5762/KAIS.2008.9.5.1172 인용 PDF

기현철
- Journal of the Institute of Electronics Engineers of Korea SD
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- v.41 no.4
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- pp.67-74
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- 2004
As data rate was increased, the conventional burst-mode automatic power control circuit caused errors due to the effort of the mark density variation. To solve this problem we invented a new structured peak-comparator which could eliminate the effect of the mark density variation even in high date rate, and revised the conventional one using it. We proposed a burst-mode automatic power control circuit robust to mark density variations. We found that the peak-comparator in the proposed automatic power control circuit was very robust to mark density variations because it affected very little by the mark density variation in high date rate and in the wide variation range of the reference current and the difference current.
PDF KSCI

Yoo, Young-Kil;Lee, Han-Young
- Journal of the Institute of Electronics Engineers of Korea TC
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- v.44 no.7 s.361
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- pp.96-104
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- 2007
In this paper, the field solver based deembedding technique for the on-chip inductors to deembed the pad and surrounding ground effect was described, and the results from field solver based deembedding techniques and measurement based matrix calculation method were compared. In addition, LNA circuit is designed by using deembedded inductors and fabricated by using standard $0.25{\mu}m$ CMOS process, in the range over the 2.5GHz it shows the good agreements between measurement and simulation results when the proper deembedding was adapted. Supposed deembedding techniques can be used to get the pure on-chip devices's values and adapted to design accurate RFIC circuit design.
PDF KSCI