• Title/Summary/Keyword: 보상 커패시터

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Development of Constant Output Power Supply System for Ozonizer (오존발생장치용 정출력 전원장치의 개발)

  • Woo, Jung-In;Woo, Sung-Hoon;Roh, In-Bae;Park, Jee-Ho;Kim, Dong-Wan
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.7
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    • pp.113-121
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    • 2005
  • In this paper, a constant output power supply system for ozonizer is proposed to remove the noise of ozonizer and control the output of ozonizer using feedback control. The proposed system is based on the rouble control loop such as the outer voltage control loop and inner current control loop. In the proposed system overshoots and oscillations due to the computation time-delay are compensated by explicit incorporation of the time-delay in the current control loop transfer function. The inner current control loop is adopted by an internal model controller. The internal model controller is designed to a second order deadbeat reference-to-output response which means that its response reaches the reference in two sampling time including computational time-delays. The outer voltage control loop employing P-Resonance controller is proposed. The resonance controller has an infinite gain at resonant frequency, and the resonant frequency is set to the fundamental frequency of the reference voltage in this paper. Thus the outer voltage control loop causes no steady state error as regard to both magnitude and phase. The effectiveness of the proposed control system has been verified by the experimental results.

Design of Robust Double Digital Controller to Improve Performance for UPS Inverter (UPS 인버터의 성능 개선을 위한 강인한 2중 디지털 제어기의 설계)

  • 박지호;노태균;김춘삼;안인모;우정인
    • The Transactions of the Korean Institute of Power Electronics
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    • v.8 no.2
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    • pp.116-127
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    • 2003
  • In this paper, a new fully digital control method for UPS inverter, which is based on the double control loop such as the outer voltage control loop and inner current control loop, is proposed. In the proposed control system, overshoots and oscillations due to the computation time-delay are compensated by explicit incorporation of the time-delay in the current control loop transfer function. The inner current control loop is adopted by an Internal model controller The Internal model controller is designed to a second order deadbeat reference-to-output response which means that its response reaches the reference in two sampling time including computational time-delays. The outer voltage control loop employing P-Resonance controller is proposed. The resonance controller has an infinite gain at resonant frequency, and the resonant frequency is set to the fundamental frequency of the reference voltage in this paper. Thus the outer voltage control loop causes no steady state error as regard to both magnitude and phase. The effectiveness of the proposed control system has been verified by the simulation and experimental results respectively.

Design of the High Efficiency DC-DC Converter Using Low Power Buffer and On-chip (저 전력 버퍼 회로를 이용한 무선 모바일 용 스텝다운 DC-DC 변환기)

  • Cho, Dae-Woong;Kim, Soek-Jin;Park, Seung-Chan;Lim, Dong-Kyun;Jang, Kyung-Oun;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.9
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    • pp.1-7
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    • 2008
  • This paper proposes 3.3V input and 1.8V output voltage mode step-down DC-DC buck converter for wireless mobile system which is designed in a standard 0.35$\mu$m CMOS process. The proposed capacitor multiplier method can minimize error amplifier compensation block size by 30%. It allows the compensation block of DC-DC converter be easily integrated on a chip. Also, we improve efficiency to 3% using low power buffer. Measurement result shows that the circuit has less than 1.17% output ripple voltage and maximum 83.9% power efficiency.

Development of Digital Controller and Monitoring System for UPS Inverter (UPS 인버터의 디지털 제어기 및 모니터링 시스템의 개발)

  • Park, Jee-Ho;Hwang, Gi-Hyun;Kim, Dong-Wan
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.44 no.1
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    • pp.1-11
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    • 2007
  • In this paper, a new fully digital control method for UPS inverter, which is based on the double control loop such as the outer voltage control loop and inner current control loop, is proposed. In the proposed control system, overshoots and oscillations due to the computation time-delay are compensated by explicit incorporation of the time-delay in the current control loop transfer function. The inner current control loop is adopted by an internal model controller. The internal model controller is designed to a second order deadbeat reference-to-output response which means that its response reaches the reference in two sampling time including computational time-delays. The outer voltage control loop employing P-Resonance controller is proposed. The resonance controller has an infinite gain at resonant frequency, and the resonant frequency is set to the fundamental frequency of the reference voltage in this paper. Thus the outer voltage control loop causes no steady state error as regard to both magnitude and phase. The effectiveness of the proposed control system has been verified by the simulation and experimental results respectively.

An Analysis of Voltage Characteristics for LC Resonant Frequency Band of Capacitor Compensation According to Moving of Electrical Separation Equipment of AF Track Circuit (AF궤도회로의 전기적 구분 장치 설치이전에 따른 커패시터 보상으로 LC공진 주파수 대역의 전압특성 분석)

  • Won, Seo-Yeon;Choi, Jae-Sik;Park, Hun-Jue;Kim, Hie-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.8
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    • pp.1466-1477
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    • 2016
  • This paper analyzes the electrical characteristic such as the impedance(Z), inductance(L), and cable resistance($R_p$) according to the change of cable length in order to move the electrical sorting device for distinguishing between AF non-insulated track circuits from the center of railway to outside railway. The simulation is performed to check the voltage difference between the voltage of sender and the voltage of receiver and determine the possibility of the voltage restoration availability in the frequency filter band through the capacitor compensation. It was applied to the results of the simulation to the sorting devices installed in the actual field. It is proved the availability by checking the measured voltage characteristic according to the capacitor compensating change of $10{\mu}F$ and $16{\mu}F$ before, and after the length of cable is increased with 6 meters. Through this, the prevention of breakdown and damage to facilities and the prevention the safety-related accidents of line workers from the train are expected according to moving the sorting devices of AR non-insulated track circuits to outside railway.

A Low Area and High Efficiency SMPS with a PWM Generator Based on a Pseudo Relaxation-Oscillating Technique (Pseudo Relaxation-Oscillating 기법의 PWM 발생기를 이용한 저면적, 고효율 SMPS)

  • Lim, Ji-Hoon;Wee, Jae-Kyung;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.11
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    • pp.70-77
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    • 2013
  • We suggest a low area and high efficiency switched-mode power supply (SMPS) with a pulse width modulation (PWM) generator based on a pseudo relaxation-oscillating technique. In the proposed circuit, the PWM duty ratio is determined by the voltage slope control of an internal capacitor according to amount of charging current in a PWM generator. Compared to conventional SMPSs, the proposed control method consists of a simple structure without the filter circuits needed for an analog-controlled SMPS or the digital compensator used by a digitally-controlled SMPS. The proposed circuit is able to operate at switching frequency of 1MHz~10MHz, as this frequency can be controlled from the selection of one of the internal capacitors in a PWM generator. The maximum current of the core circuit is 2.7 mA, and the total current of the entire circuit including output buffer driver is 15 mA at 10 MHz switching frequency. The proposed SMPS has a simulated maximum ripple voltage of 7mV. In this paper, to verify the operation of the proposed circuit, we performed simulation using Dongbu Hitek BCD $0.35{\mu}m$ technology and measured the proposed circuit.