• Title/Summary/Keyword: 병렬-직렬 구조

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Current Sharing for the Multi-parallel Configuration of High Power Thyristors (대전력 Thyristor 다병렬 구조의 전류배분)

  • Choi, J.;Oh, J.S.;Suh, J.H.;An, J.S.;Kwon, O.
    • Proceedings of the KIPE Conference
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    • 2010.11a
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    • pp.369-370
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    • 2010
  • 토카막(Tokamak)형 핵융합실험장치의 초전도전자석 전원공급장치는 수 kV, 수십 kA의 대전력 직류전원를 얻기 위한 ac-dc 컨버터가 필요하다. 이와 같은 고전압, 대전류 사양을 얻기 위하여 일반적으로 thyristor ac-dc 컨버터를 사용하며, 필요한 전류사양을 충족하기 위하여 다수의 대전류용 thyristor 소자를 병렬로 연결하여 각 암(arm)의 스위치를 구성한다. 이와 같이 다수의 반도체 스위치 소자를 병렬로 연결하여 사용하는 경우에는 각 단위 소자별 전압강하, 직렬회로 임피던스 및 전류 경로 차이 등의 이유로 균등한 전류 배분을 얻기가 쉽지 않다. 본 논문에서는 각 암(arm)마다 8개씩의 대전류 thyristor 를 병렬로 연결 구성하여 제작한 시작품 단상 컨버터에 대한 전류배분 실험을 실시하고 그 결과를 분석 및 정리한다.

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Serially Concatenated Space-Time Code using Iterative Decoding of High Data Rate Wireless Communication (고속 무선 통신을 위한 반복 복호 직렬 연쇄 시.공간 부호)

  • 김웅곤;구본진;양하영;강창언;홍대식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4A
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    • pp.519-527
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    • 2000
  • This paper suggests and analyzes the Serially Concatenated Space-Time Code(SCSTC) with the possibility of a efficient high-speed transmission in a band limited channel. The suggested code has a structure that uses the interleaver to connect the space-time code as an inner code and the convolutional code as a outer code serially. This code keeps the advantage of high-speed transmission and also has the high BER performance. The performance of the suggested system is compared with the conventional bandwidth efficient trellis coded modulation, such as a Serially Concatenated Trellis Coded Modulation (SCTCM) and a Turbo-Trellis Coded Modulation(Turbo-TCM). The results show that the suggested system has a 2.8dB and 3dB better BER performance than SCTCM and Turbo-TCM respectively in case of the transmission rate 2b/s/Hz in fading channel.

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A Study on the Failure Characteristic of Laminated Composites Joint Containing Two Holes in Series or Parallel (복합적층판의 직병렬 유공 접합부의 파손연구)

  • Kwan-Hyung Song
    • Journal of the Society of Naval Architects of Korea
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    • v.32 no.2
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    • pp.93-102
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    • 1995
  • A series of test was performed by measuring the failure strength and the failure mode of fiber reinforced composite laminates joint containing two holes in Series or Parallel. $[0^{\circ}/45^{\circ}/90^{\circ}/-45^{\circ}]_s$ laminate with W/d(Side distance ratio) 4.0 and E/d(Edge distance ratio) 3.0 has the full bearing strength and are preferable in case of the good efficiency in two series hole. Comparisons were made between testing results and predicting values of the FEM model. Good agreements were fecund between them except the case of $E/d=2{\sim}3$. In the case of $G_h{\geq}3.0d$ and $G_v{\geq}3.0d$ since the interaction coefficients between two parallel holes and between two series holes were small, holes can be treated as independent. The Acoustic Emission(AE) and SEM method were utilized to find out the initial defects, damage and the fracture mechanism.

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3D modeling of plasma characteristics for multi-segment antenna inductively coupled plasma (3D ICP에서 multi-segment antenna 구성에 따른 플라즈마 특성 모델링)

  • Yang, Won-Gyun;Kim, Yeong-Uk;Go, Seok-Il;Ju, Jeong-Hun
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2007.04a
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    • pp.99-100
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    • 2007
  • 유도결합 플라즈마(ICP)를 이용한 CVD 장치에서 플라즈마를 발생시키기 위한 안테나의 구조는 매우 중요하다. 전자 온도와 전자 밀도에 직접적인 영향을 주게 되며, 뿐만 아니라 증착 물질의 두께 균일도에 결정적인 역할을 하게 된다. 본 연구에서는 플라즈마 특성 균일도 최적화를 위하여 2turn 직렬, 병렬, 혼합의 ICP 안테나의 구조에 대하여 플라즈마 특성 및 $SiO_2$ CVD 증착 특성을 계산하였다.

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Performance analysis of multistage interference cancellation schemes for a DS/CDMA system subject to delay constraint (CD/CDMA 시스템에서의 제한된 처리 지연 시간을 고려한 단단계 간섭 제거 방식에 대한 성능 분석)

  • 황선한;강충구
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.12
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    • pp.2653-2663
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    • 1997
  • The successive and parallel interference cancellation schemes are two well-known types of multi-stage interference cancellation schemes using the conventional correlator receivers as a basic building block, which has been known to significantly improve the performance of DS/CDMA system in the multiple access communication. Performance comparison between these two schemes is made strictly based on the analytical and it has been shown that the successive interference cancellation (SIC) scheme is more resistant to fading than the parallel interference cancellation (PIC) scheme. We further investigate the performance of the successive IC scheme subject to the delay constraint, which may be imposed typically on most of service applications with a real-time transmission requirement, including speech and video applications. Our analysis demonstrates that the performance may be significantly improved by the groupwise successive interference cancellation (GSIC) scheme, which can be properly optimized to meet the given delay constraint.

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Design of Serial-Parallel Multiplier for GF($2^n$) (GF($2^n$)에서의 직렬-병렬 곱셈기 구조)

  • 정석원;윤중철;이선옥
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.13 no.3
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    • pp.27-34
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    • 2003
  • Recently, an efficient hardware development for a cryptosystem is concerned. The efficiency of a multiplier for GF($2^n$)is directly related to the efficiency of some cryptosystem. This paper, considering the trade-off between time complexity andsize complexity, proposes a new multiplier architecture having n[n/2] AND gates and n([n/2]+1)- $$\Delta$_n$ = XOR gates, where $$\Delta$_n$=1 if n is even, $$\Delta$_n$=0 otherwise. This size complexity is less than that of existing ${multipliers}^{[5][12]}$which are $n^2$ AND gates and $n^2$-1 XOR gates. While a new multiplier is a serial-parallel multiplier to output a result of multiplication of two elements of GF($2^n$) after 2 clock cycles, the suggested multiplier is more suitable for some cryptographic device having space limitations.

Massive Parallel Processing Algorithm for Semiconductor Process Simulation (반도체 공정 시뮬레이션을 위한 초고속 병렬 연산 알고리즘)

  • 이제희;반용찬;원태영
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.3
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    • pp.48-58
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    • 1999
  • In this paper, a new parallel computation method, which fully utilize the parallel processors both in mesh generation and FEM calculation for 2D/3D process simulation, is presented. High performance parallel FEM and parallel linear algebra solving technique was showed that excessive computational requirement of memory size and CPU time for the three-dimensional simulation could be treated successively. Our parallelized numerical solver successfully interpreted the transient enhanced diffusion (TED) phenomena of dopant diffusion and irregular shape of R-LOCOS within 15 minutes. Monte Carlo technique requires excessive computational requirement of CPU time. Therefore high performance parallel solving technique were employed to our cascade sputter simulation. The simulation results of Our sputter simulator allowed the calculation time of 520 sec and speedup of 25 using 30 processors. We found the optimized number of ion injection of our MC sputter simulation is 30,000.

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Locomotion Control of Biped Robots with Serially-Linked Parallel Legs (이중 병렬형 다리 구조를 가진 2족보행로봇의 보행제어)

  • Yoon, Jung-Han;Park, Jong-Hyeon
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.34 no.6
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    • pp.683-693
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    • 2010
  • In this paper, we propose a new parallel mechanism for the legs of biped robots and the control of the robot's locomotion. A leg consists of two 3-DOF parallel platforms linked serially: one is an orientation platform for a thigh and the other is the 3-DOF asymmetric parallel platform for the shank. The desired locomotion trajectory is generated on the basis of the Gravity-Compensated Inverted Pendulum Mode (GCIPM) in the sagittal direction and the Linear Inverted Pendulum Mode (LIPM) in the lateral direction, respectively. In order to simulate the ground reaction force, a 6-DOF elastic pad model is used underneath each of the soles. The performance and effectiveness of the proposed parallel mechanism and locomotion control are shown by the results of computer simulations of a 12-DOF parallel biped robot using $SimMechanics^{(R)}$.

High Speed Turbo Product Code Decoding Algorithm (고속 Turbo Product 부호 복호 알고리즘 및 구현에 관한 연구)

  • Choi Duk-Gun;Lee In-Ki;Jung Ji-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6C
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    • pp.442-449
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    • 2005
  • In this paper, we introduce three kinds of simplified high-speed decoding algorithms for turbo product decoder. First, A parallel decoder structure, the row and column decoders operate in parallel, is proposed. Second, HAD(Hard Decision Aided) algorithm is used for early-stopping algorithm. Lastly, P-Parallel TPC decoder is a parallel decoding scheme, processing P rows and P columns in parallel instead of decoding one by one as that in the original scheme.

저궤도 위성용 리튬-이온 배터리의 성능 확보를 위한 Balancing기법에 관한 고찰

  • Lee, Sang-Rok;Im, Seong-Bin;Jeon, Hyeon-Jin
    • The Bulletin of The Korean Astronomical Society
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    • v.37 no.2
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    • pp.188.1-188.1
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    • 2012
  • 인공위성에 사용되는 배터리 기술은 1960년대 최초로 사용된 니켈 카드뮴(NiCd)을 시작으로 발전하기 시작해서 현재는 리튬-이온(Li-Ion)에 이르렀다. 리튬-이온 배터리는 높은 Energy Density(작은 크기와 무게), 낮은 자가 방전율을 가짐과 동시에 메모리 효과가 거의 없다는 장점이 있다. 하지만 리튬-이온 배터리 팩의 성능(Voltage, Capacity, Lifetime)은 사용된 Cell간 특성차이(State of Charge, Total Capacity Difference, Internal Impedance)에 의해 제한된다. 일반적으로 배터리는 원하는 전압과 용량을 확보하기 위해 직렬-병렬 혹은 병렬-직렬 구조를 가지는 팩 형태로 제작 된다. Cell간 특성차이가 존재하는 상태에서 배터리 팩을 사용할 경우 특정 Cell의 과충전 및 과방전이 발생하며 이로 인해 수명이 단축될 수 있고 심한 경우 폭발이 발생할 수 도 있다. 또한 Cell간 특성차이는 배터리팩의 사용가능 용량을 제한하는 효과를 가져 온다. 본 논문에서는 Battery 팩을 구성하는 Cell들에 특성 차이가 존재할 경우 발생할 수 있는 Battery 팩의 수명 단축 및 용량 감소 Mechanism에 대해서 고찰한다. 또한 Cell간 특성차이를 극복하기 위해 실제 위성 운용에 적용될 수 있는 배터리팩의 Balancing 방안과 함께 위성에 장착을 위해 보관중인 4p12s Battery의 Balancing 방안에 대해 고찰하고 Balancing 전후의 Cell간 특성(Voltage Dispersion) 차이 측정결과를 보인다. 이렇게 본 논문에서 소개한 리튬-이온 배터리의 전반적인 Balancing 방안은 추후 인공위성에 적용되는 리튬-이온 배터리의 운용 및 보관에 Guide Line을 제시할 것이라고 판단한다.

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