• Journal of KIISE:Computing Practices and Letters
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• v.16 no.7
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• pp.775-787
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• 2010

Unlike general-purpose CPUs, the GPUs have been specialized as many-core streaming processors, and are frequently replacing the CPUs in an increasing range of computations thanks to their outstanding parallel computing capacity. In order to respond to such trend, NVIDIA has recently issued a new parallel computing architecture called CUDA(Compute Unified Device Architecture), offering a flexible GPU programming environment for GPGPU(General Purpose GPU) computing. In general, when programmers use the CUDA API, they should clearly understand many aspects of GPU's computing architecture to produce efficient parallel software. In this article, we explain several optimization techniques for CUDA programming that we have verified through a lot of experiment and trial and error, and review how those techniques affect the performance of code execution. In particular, we use a specific problem as an example to analyze several elements that affect performances, such as effective accesses to hierarchical memory system, processor occupancy, and latency hiding. In conclusion, we present several directions that may be utilized effectively in CUDA-based parallel programming.

• KIPS Transactions on Computer and Communication Systems
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• v.4 no.7
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• pp.213-218
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• 2015

Given two strings X and Y (|X|=m, |Y|=n) over an alphabet ${\Sigma}$, the extended edit distance between X and Y can be computed using dynamic programming in O(mn) time and space. Recently, a parallel algorithm that takes O(m+n) time and O(mn) space using m threads to compute the extended edit distance between X and Y was presented. In this paper, we present an improved parallel algorithm using the shared memory on GPU. The experimental results show that our parallel algorithm runs about 19~25 times faster than the previous parallel algorithm.

• Journal of Digital Contents Society
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• v.18 no.3
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• pp.613-619
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• 2017

This paper presents a CUDA (Compute Unified Device Architecture) code to achieve correct GPU parallel segmented prefix operation results with less than 32 segment length for large data arrays. Mark Harris and Michael Garland had published CUDA code to address the tasks. This paper shows that their code does not generate correct results when the local segment length is less than 32, discusses the cause of the problem, and presents a CUDA code that generates correct results. The segmented parallel prefix operation presented in this paper can be applied as a building block to various large parallel processing algorithms including the k-nearest neighbor search problems.

• The KIPS Transactions:PartB
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• v.19B no.4
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• pp.243-248
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• 2012

In the information retrieval systems like vector model implementation and document clustering, document similarity calculation takes a great part on the overall performance of the system. In this paper, GPU parallelism has been explored to enhance the processing speed of document similarity calculation in a CUDA framework. The proposed method increased the similarity calculation speed almost 15 times better compared to the typical CPU-based framework. It is 5.2 and 3.4 times better than the methods by using CUBLAS and Thrust, respectively.

• KIISE Transactions on Computing Practices
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• v.23 no.3
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• pp.156-164
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• 2017

Measuring the similarity of two graphs is a basic tool to solve graph problems in various applications. Most graph algorithms have a high time complexity according to the number of vertices and edges. Because Graphics Processing Units (GPUs) have a high computational power and can be obtained at a low cost, these have been widely used in graph applications to improve execution time. This paper proposes an efficient parallel algorithm to measure graph similarity using the CUDA on a GPU environment. The experimental results show that the proposed approach brings a considerable improvement in performance and efficiency when compared to CPU-based results. Our results also show that the performance is improved significantly as the size of the graph increases.

• Journal of Broadcast Engineering
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• v.24 no.6
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• pp.1064-1071
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• 2019

Multiview stereo matching algorithm is used to reconstruct 3D shape from a set of 2D images. Conventional multiview stereo algorithms have been implemented on high-performance hardware due to the heavy complexity that contains a large number of calculations in each step. However, as the performance of mobile graphics processors has recently increased rapidly, complex computer vision algorithms can now be implemented on mobile devices like a smartphone and an embedded board. In this paper we parallelize an multiview stereo algorithm using OpenCL on mobile GPU and provide various optimization techniques on the embedded hardware with limited resource.

• KIPS Transactions on Computer and Communication Systems
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• v.8 no.5
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• pp.111-118
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• 2019

Recent graphic processing units (GPUs) provide high throughput by using powerful hardware resources. However, massive memory accesses cause GPU performance degradation due to cache inefficiency. Therefore, the performance of GPU can be improved by reducing thread parallelism when cache suffers memory contention. In this paper, we propose a dynamic warp scheduler which controls thread parallelism according to degree of cache contention. Usually, the greedy then oldest (GTO) policy for issuing warp shows lower parallelism than loose round robin (LRR) policy. Therefore, the proposed warp scheduler employs the LRR warp scheduling policy when Miss Status Holding Register(MSHR) utilization is low. On the other hand, the GTO policy is employed in order to reduce thread parallelism when MSHRs utilization is high. Our proposed technique shows better performance compared with LRR and GTO policy since it selects efficient scheduling policy dynamically. According to our experimental results, our proposed technique provides IPC improvement by 12.8% and 3.5% over LRR and GTO on average, respectively.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.07a
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• pp.396-398
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• 2011

본 논문은 두 대의 카메라와 한 대의 프로젝터로 구성된 Pro-cam시스템을 이용하여, 출력된 패턴 영상을 카메라로 촬영하고 이를 기반으로 Depth Map을 계산하는 모듈의 실시간 처리를 위한 GPU기반 병렬처리 기법을 제안한다. 입력받은 영상으로부터 구조광의 패턴을 해석하고, Depth Map을 계산하기 위해서, Dynamic pattern decoding하는 과정은 프로젝터의 패턴영상과 촬영된 카메라 패턴영상 간의 관계를 반복적으로 비교하므로, 이를 GPU 프로그래밍을 이용하여 병렬 처리를 통해 고속화하였다. 결과적으로 본 논문에서는 기존 CPU에서 수행했던 속도에 비해 약 18배정도 속도를 개선 할 수 있었다.

• Proceedings of the Korea Information Processing Society Conference
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• 2019.10a
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• pp.141-143
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• 2019

본 연구에서는 메소스코픽 교통 시뮬레이션 모델의 하나인 LCTM(Lane Cell Transmission Model) 모델을 GPU 기반의 병렬 교통 시뮬레이션의 형태로 구현하여, 수행한 시뮬레이션 시간을 측정하였다. 본 논문에서는 LCTM 교통 시뮬레이션의 병렬화 고려사항들을 언급하고, GPU 를 사용한 병렬 교통 시뮬레이션 구현 시, 성능에 영향을 미치는 요소들을 분석한 후, 측정하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2022.05a
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• pp.708-711
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• 2022

본 논문은 3D 프린팅 출력 성공률을 높이기 위해 GPU를 이용한 대용량 3D 메쉬 모델에 대한 병렬 자체충돌 검사 방법을 제안한다. 강인하고 견고한 자체 충돌 검사를 위해 분리축 검사, 삼각형-삼각형 교차 검사, 메쉬 연결성 검사, 대용량 메쉬를 위한 분할 처리 기법의 절차를 제안한다. 이러한 자체 충돌 검사를 빠르게 수행하기 위하여 GPU 기반 병렬처리 구현 방법을 제시한다.