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Analysis of Programming Techniques for Creating Optimized CUDA Software  

Kim, Sung-Soo (서강대학교 컴퓨터공학과)
Kim, Dong-Heon (서강대학교 컴퓨터공학과)
Woo, Sang-Kyu (서강대학교 컴퓨터공학과)
Ihm, In-Sung (서강대학교 컴퓨터공학과)
Publication Information
Journal of KIISE:Computing Practices and Letters / v.16, no.7, 2010 , pp. 775-787 More about this Journal
Abstract
Unlike general-purpose CPUs, the GPUs have been specialized as many-core streaming processors, and are frequently replacing the CPUs in an increasing range of computations thanks to their outstanding parallel computing capacity. In order to respond to such trend, NVIDIA has recently issued a new parallel computing architecture called CUDA(Compute Unified Device Architecture), offering a flexible GPU programming environment for GPGPU(General Purpose GPU) computing. In general, when programmers use the CUDA API, they should clearly understand many aspects of GPU's computing architecture to produce efficient parallel software. In this article, we explain several optimization techniques for CUDA programming that we have verified through a lot of experiment and trial and error, and review how those techniques affect the performance of code execution. In particular, we use a specific problem as an example to analyze several elements that affect performances, such as effective accesses to hierarchical memory system, processor occupancy, and latency hiding. In conclusion, we present several directions that may be utilized effectively in CUDA-based parallel programming.
Keywords
GPU; many-core processor; parallel programming; CUDA; memory hierarchy; latency hiding; occupancy; Sobel operator;
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