• Proceedings of the Korean Information Science Society Conference
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• 2001.10b
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• pp.172-174
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• 2001

유전자알고리즘을 병렬로 처리하려는 이유는 수행시간의 향상과 최적해의 향상이다. 하지만 이에 대한 연구와 응용이 적은데 이는 연구 환경이 열악하기 때문이다. 즉, 슈퍼컴퓨터와 같은 고가의 장비가 필요하며, 그것이 보편적으로 우리 주변에 있지 않다는 것이 가장 큰 장애가 되었다. 이를 극복하기 위한 방법은 에이전트라는 소프트웨어를 이용해서 유전자 알고리즘을 병렬로 처리를 하는 것이다. 이 연구에서는 이런 방법으로 유전자 알고리즘을 병렬로 처리를 하여도 수행시간의 향상과 최적해의 향상을 보일 수 있는지를 연구한다.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.4 s.316
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• pp.101-108
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• 2007

Parallel processing algorithms, coupled with advanced networking and distributed computing architectures, improve the overall computational performance, dependability, and versatility of a digital signal processing system In this paper, novel parallel algorithms are introduced and investigated for advanced sonar algorithm, conventional matched-field processing (CMFP). Based on a specific domain, each parallel algorithm decomposes the sequential workload in order to obtain scalable parallel speedup. Depending on the processing requirement of the algorithm, the computational performance of the parallel algorithm reveals different characteristics. The high-complexity algorithm, CMFP shows scalable parallel performance on the array of DSP processors. The impact on parallel performance due to workload balancing, communication scheme, algorithm complexity, processor speed, network performance, and testbed configuration is explored.

• Journal of the Korea Society of Computer and Information
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• v.17 no.1
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• pp.171-181
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• 2012

This paper defines the AES password algorithm used as a symmetric-key-based password algorithm, and proposes the design of parallel password algorithm to utilize the resources of multi-core processor as much as possible. The proposed parallel password algorithm was confirmed for parallel execution of password computation by allocating the password algorithm according to the number of cores, and about 30% of performance increase compared to AES password algorithm. The encryption/decryption performance of the password algorithm was confirmed through binary comparative analysis tool, which confirmed that the binary results were the same for AES password algorithm and proposed parallel password algorithm, and the decrypted binary were also the same. The parallel password algorithm for multi-core environment proposed in this paper can be applied to authentication/payment of financial service in PC, laptop, server, and mobile environment, and can be utilized in the area that required high-speed encryption operation of large-sized data.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.10
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• pp.1919-1926
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• 2016

Because of the enormous processing ability, General-Purpose Graphics Processing Unit(GPGPU) has been applied to many fields including electronics design automation. The SAT algorithm is one of the core algorithm in many electronics design automation tools. There has been some efforts to apply GPGPU to the SAT algorithm, but it is difficult to parallelize the SAT algorithm because of its characteristics. In this paper, I applied GPGPU to the SAT algorithm by parallelizing the propagation routine that is relatively suitable to parallel processing. On the basis of the similarity of the propagation routine to the sparse matrix multiplication, the data structure for the SAT problem is constituted, and the parallel propagation routine is described. To prevent data loss between paralllel threads, atomic operations are exploited. The experimental results for some benchmark SAT problems show that the proposed algorithm is superior to the previous GPGPU-based SAT solver.

• The KIPS Transactions:PartA
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• v.8A no.1
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• pp.36-41
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• 2001

In this paper, we first design an parallel quadratic sieve algorithm for factoring method. We then present parallel factoring algorithm for factoring a large odd integer by repeatedly using the parallel quadratic sieve algorithm based on the divide-and-conquer strategy on SIMD machines with DMM. We show that this algorithm is optimal in view of the product of time and processor numbers.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06b
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• pp.21-24
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• 2011

본 논문은 확장성(scalability)과 견고함(robustness)을 강조하는 새로운 형태의 병렬 분산 메타-휴리스틱 프레임워크를 제안하고 있다. PADO (Parallel And Distributed Optimization framework) 라고 이름 지어진 본 프레임워크는 이종의 계산 및 통신 자원들을 활용하여 메타-휴리스틱 알고리즘을 병렬화하고 스케일러블한 속도 향상을 얻을 수 있다. 본 프레임워크는 기존의 시퀀셜(sequential) 최적화 프레임워크에 메타-휴리스틱 알고리즘의 병렬화 기법중 하나인 island 모델을 개선하여 구현하였다. 본 연구는 부분적으로 정렬된 지식 공유 방법(Partially Ordered Knowledge Sharing) 모델을 이용하여 병렬 환경 코디네이션(coordination) 오버헤드를 줄였고 계산 노드에 대한 확장성을 얻었다. 본 프레임워크를 통해 기존의 많은 메타-휴리스틱 알고리즘들을 재사용 할 수 있고 다양한 분야의 최적화 문제에 적용 할 수 있으며 계산량이 많은 메타-휴리스틱 알고리즘을 병렬화를 통해 문제를 푸는 시간을 단축 할 수 있다. 순회 판매원 문제(Traveling Salesman Problem)를 통해 프레임워크의 실효성을 검증하였다.

• Proceedings of the KIPE Conference
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• 2009.11a
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• pp.120-122
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• 2009

발전용 연료전지 시스템은 수소와 산소를 공급받아 직류전기와 열로 변화시키는 연료전지 스택, 연료전지 스택에 연료와 공기를 공급해주는 MBOP(Mechanical Balance Of Plant), 연료전지의 출력을 계통에 연계시키는 EBOP(Electrical Balance Of Plant)로 구성된다. EBOP 시스템은 병렬 연결된 1.5MW PCU(Power Conversion Unit)로 구성되며, 각 PCU는 750kW 인버터가 병렬로 구성된다. 본 논문에서는 4병렬로 구성된 3MW급 연료전지용 EBOP의 병렬제어 알고리즘을 소개한다. 제안한 병렬제어 알고리즘은 과도응답이 빠르고 순환전류가 없는 제어특성을 가진다. 그리고 시뮬레이션과 실험으로 제안한 알고리즘의 성능을 확인한다.

• The Journal of the Korea Contents Association
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• v.16 no.10
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• pp.608-616
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• 2016

The Smith-Watrman (SW) algorithm is a local alignment algorithm which is one of important operations in DNA sequence analysis. The SW algorithm finds the optimal local alignment with respect to the scoring system being used, but it has a problem to demand long execution time. To solve the problem of SW, some methods to perform SW in distributed and parallel manner have been proposed. The ADAM which is a distributed and parallel processing framework for DNA sequence has parallel SW. However, the parallel SW of the ADAM does not consider that the SW is a dynamic programming method, so the parallel SW of the ADAM has the limit of its performance. In this paper, we propose a method to enhance the parallel SW of ADAM. The proposed parallel SW (PSW) is performed in two phases. In the first phase, the PSW splits a DNA sequence into the number of partitions and assigns them to multiple nodes. Then, the original Smith-Waterman algorithm is performed in parallel at each node. In the second phase, the PSW estimates the portion of data sequence that should be recalculated, and the recalculation is performed on the portions in parallel at each node. In the experiment, we compare the proposed PSW to the parallel SW of the ADAM to show the superiority of the PSW.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.3
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• pp.236-242
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• 2004

In this paper, we propose an approach to parallelize a load balancing algorithm that was shown to be very effective in distributing workload for parallel computations. Load balancing algorithms are required in executing parallel program efficiently As a parallel computation model, we used dynamically growing tree structure that can be found in many application problems. The load balancing algorithm tries to balance the workload among processors while keeping the communication cost under certain limit. We show how the load balancing algorithm is effectively parallelized on mesh and hypercube interconnection networks, and analyzed the time complexity for each case to show that parallel algorithm actually reduced the various overhead.

• The KIPS Transactions:PartA
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• v.9A no.2
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• pp.249-258
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• 2002

One of the jai or purposes of multiprocessor system is to get a high efficiency in performance improvement. But in most cases, it is unavoidable to use some special programming languages or tools for full use of multiprocessor system. In general, loop and recursive call statements of algorithms are considered as typical parts for parallelization. Especially, recursive call statements are easy to parallelize conceptually without support of any special languages or tools. But it is difficult to control the degree of parallelism caused by high depth of recursive call leading to execution crash. This paper proposes a device to control Parallelism in the process of POSIX thread bated parallelization of recursive algorithms. For this, we define the concept of thread and process in UNIX system, and analyze the results of experimental application of the device to quick sorting algorithm.