Browse > Article
http://dx.doi.org/10.6109/jkiice.2016.20.10.1919

GPGPU Acceleration of SAT Algorithm with Propagation Routine Parallelization  

Kang, Hyeong-Ju (School of Computer Science and Engineering, Korea University of Technology and Education)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.20, no.10, 2016 , pp. 1919-1926 More about this Journal
Abstract
Because of the enormous processing ability, General-Purpose Graphics Processing Unit(GPGPU) has been applied to many fields including electronics design automation. The SAT algorithm is one of the core algorithm in many electronics design automation tools. There has been some efforts to apply GPGPU to the SAT algorithm, but it is difficult to parallelize the SAT algorithm because of its characteristics. In this paper, I applied GPGPU to the SAT algorithm by parallelizing the propagation routine that is relatively suitable to parallel processing. On the basis of the similarity of the propagation routine to the sparse matrix multiplication, the data structure for the SAT problem is constituted, and the parallel propagation routine is described. To prevent data loss between paralllel threads, atomic operations are exploited. The experimental results for some benchmark SAT problems show that the proposed algorithm is superior to the previous GPGPU-based SAT solver.
Keywords
GPGPU; SAT Algorithm; Parallelization; Algorithm Acceleration; Electronics Design Automation;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Y. Deng, "GPU Accelerated VLSI Design Verification," in Proceedings of International Conference on Computer and Information Technology, pp. 1213-1218, 2010.
2 Y. Deng, B. D. Wang, and S. Mu, "Taming irregular EDA applications on GPUs," in Proceedings of International Conference on Computer Aided Design, pp. 539-546, 2009.
3 J. P. M.-Silva and K. A. Sakallah, "GRASP: A Search Algorithm for Propositional Satisfiability," IEEE Transactions on Computers, vol. 48, no. 5, pp. 506-521, May 1999.   DOI
4 M. W. Moskewicz, et al., "Chaff: Engineering an Efficient SAT Solver," in Proceedings of Design Automation Conference, pp. 530-535, 2001.
5 N. Een and N. Sorensson, "An Extensible SAT-solver," in Proceedings of International Conference on Theory and Applications of Satisfiability Testing, pp. 502-518, 2003.
6 G. Audemard and L. Simon, "Predicting learnt clauses quality in modern SAT solvers," in Proceedings of International Joint Conference on Artificial Intelligence, pp. 399-404, 2009.
7 Y. Hamadi, S. Jabbour, and L. Sais, "ManySAT: a parallel SAT solver," Journal on Satisfiability, Boolean Modelling and Computation, vol. 6, pp. 245-262, Jul. 2008.
8 H. Fujii and N. Fujimoto, "GPU acceleration of BCP procedure for SAT algorithms," in Proceedings of International Conference on Parallel and Distributed Processing Techniques and Applications, 2012.
9 NVIDIA, NVIDIA GeForce GTX 980 [Internet]. Available: http://international.download.nvidia.com/geforce-com/international/pdfs/GeForce_GTX_980_Whitepaper_FINAL.PDF.
10 A. D. Palu, et al., "CUD@SAT: SAT solving on GPUs," Journal of Experimental and Theoretical Artificial Intelligence, vol 27, no. 3, pp. 293-316, May 2015.   DOI
11 M. Garland, "Sparse matrix computations on manycore GPU's," in Proceedings of Design Automation Conference, pp. 2-6, 2008.
12 Q. Meyer, et al., "3-SAT on CUDA: Towards a massively parallel SAT solver," in Proceedings of International Conference on High Performance Computing and Simulation, pp. 306-313, 2010.
13 H. H. Hoos and T. Stutzle, "Satlib: an online resource for research on SAT," in Proceedings of International Conference on Theory and Applications of Satisfiability Testing, 282-292, 2000.
14 A. Blum, A. Kalai, and H. Wasserman, "Noise-tolerant learning, the parity problem, and the statistical query model," Journal of ACM, vol. 50, no. 4, 506-519, Jul. 2003.   DOI
15 A. Biere and et al., "Symbolic model checking using SAT procedures instead of BDDs," in Proceedings of Design Automation Conference, pp. 317-320, 1999.