• Proceedings of the Korean Information Science Society Conference
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• 2000.04a
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• pp.600-602
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• 2000

본 논문에서는 여러 개의 디스크를 클러스트화한 메시지 전송 기반의 병렬 멀티미디어 파일 시스템(PMFS: Parallel Multimedia File System)을 제안하고 설계, 구현하였다. 본 논문에서 구현한 PMFS는 이식성, 유연성 그리고 확장성을 고려한 멀티미디어 데이터를 지원하는 병렬 파일 시스템으로 2계층 분산 클러스트 구조에 적합하다. 그리고 제어 메시지와 TCP를 기반으로 서버들간에 통신을 하고 다양한 방법의 데이터 배치 기법을 제공한다. PMFS의 성능 평가 결과 데이터들이 임의 시작 블록과 DIS배치 기법으로 저장된 경우 가장 좋은 성능을 보였다.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.6
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• pp.608-618
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• 2000

We consider the problem of placing resources in a distributed computing system so that certain performance requirements may be met while minimizing the number of required resource copies, irrespective of node or link failures. To meet the requirements for high performance and high availability, minimum number of resource copies should be placed in such a way that each node has at least two copies on the node or its neighbor nodes. This is called the fault-tolerant resource placement problem in this paper. The structure of a parallel or a distributed computing system is represented by a graph. The fault-tolerant placement problem is first transformed into the problem of finding the smallest fault-tolerant dominating set in a graph. The dominating set problem is known to be NP-complete. In this paper, searching for the smallest fault-tolerant dominating set is formulated as a state-space search problem, which is then solved optimally with the well-known A* algorithm. To speed up the search, we derive heuristic information by analyzing the properties of fault-tolerant dominating sets. Some experimental results on various regular and random graphs show that the search time can be reduced dramatically using the heuristic information.

• Journal of the Korea Society for Simulation
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• v.24 no.3
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• pp.37-44
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• 2015

A queueing system with 2 parallel workstations is common in the field. Typically, the workstations have different features in terms of the inter arrival times of customers and the service times for the customers. Computer simulation study on the optimal server allocation for parallel heterogeneous queueing systems with fixed number of identical servers is presented in this paper. The queueing system is optimized with respect to minimizing the weighted system time of the customers served by 2 parallel workstations. The system time formula for the M/M/c systems in Kendall's notation is known. Thus, we first compute the optimal allocation for parallel M/M/c systems, comparing the results with those from the computer simulation experiments, and have the same results. The CETI rule is devised through optimizing M/M/c cases, which allocates the servers based on Close or Equal Traffic Intensities between workstations. Traffic intensity is defined as the arrival rate divided by the service rate times the number of servers. The CETI rule is shown to work for M/G/c, G/M/c queueing systems by numerous computer simulation experiments, even if the rule cannot be proven analytically. However, the CETI rule is shown not to work for some of G/G/c systems.

• Journal of the Korean Institute of Intelligent Systems
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• v.10 no.2
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• pp.152-160
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• 2000

This paper addresses the analysis and design of fuzzy-model-based controller for nonlinear systems using extended PDC and optimal pole-placement schemes. In the design procedure, we represent the nonlinear system using a Takagi-Sugeno fkzy model and formulate the controller rules by using the extended parallel distributed compensator (EPDC) and construct an overall fuzzy logic controller by blending all local state feedback controllers with an optimal pole-placement scheme. Unlike the commonly used parallel distributed compensation technique, by blending a newly extended parallel distributed compensator and the optimal poleplacement schemes, we can design not only a local stable k z y controller but also an overall stable fuzzy controller to perform the tacking control objective. Furthermore, a stability analysis is carried out not only for the fuzzy model but also for a real nonlinear system. Finally. the effectiveness and feasibility of the proposed fizzy model-based controller design method has been shown through a simulation example.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.41 no.2
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• pp.9-22
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• 2004

This paper presents a parallel genetic algorithm for the Multi-disk data allocation problem an NP-complete problem. This problem is to find a method to distribute a Binary Cartesian Product File on disk-arrays to maximize parallel disk I/O accesses. A Sequential Genetic Algorithm(SGA), DAGA, has been proposed and showed the superiority to the other proposed methods, but it has been observed that DAGA consumes considerably lengthy simulation time. In this paper, a parallel version of DAGA(ParaDAGA) is proposed. The ParaDAGA is a 2-dimension torus-based Parallel Genetic Algorithm(PGA) and it is based on a distributed population structure. The ParaDAGA has been implemented on the parallel computer simulated on a single processor platform. Through the simulation, we study the impact of varying ParaDAGA parameters and compare the quality of solution derived by ParaDAGA and DAGA. Comparing the quality of solutions, ParaDAGA is superior to DAGA in all cases of configurations in less simulation time.

• Proceedings of the Korea Information Processing Society Conference
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• 2000.10a
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• pp.653-656
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• 2000

본 논문에서는 공간데이터의 병렬성을 고려한 클러스트 시스템을 제안하였다. 클러스트 시스템의 큰 단점인 다단계 프로토콜 스택에서 오는 메시지 전송 부하를 줄인 VIA(Virtual Interface Architecture)를 기반으로 클러스트 시스템을 구성하고 저장 서버들간에는 공간데이터의 지역성에 기반하여 데이터를 배치하며 저장 서버들 내에서는 공간 데이터의 병렬성을 고려하여 EPR(Enhanced Parallel R-tree)로 데이터를 배치하였다. 위의 클러스트 시스템을 기반으로 적절한 전송 데이터 크기와 전송 횟수를 구하기 위한 실험을 실시하였다.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.1
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• pp.111-116
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• 2019

Recently, GPU expands application domains from graphic processing to various kinds of parallel workloads. However, current GPU systems focus on the maximization of each workload's parallelism through simplified control rather than considering various workload characteristics. This paper classifies the resource usage characteristics of GPU workloads into computing-bound, memory-bound, and dependency-latency-bound, and quantifies the fine-grained bottleneck for efficient workload allocation. For example, we identify the exact bottleneck resources such as single function unit, double function unit, or special function unit even for the same computing-bound workloads. Our analysis implies that workloads can be allocated together if fine-grained bottleneck resources are different even for the same computing-bound workloads, which can eventually contribute to efficient workload allocation in GPU.

• Journal of the Korea Society for Simulation
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• v.19 no.2
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• pp.107-118
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• 2010

Automotive manufacturing is a complex task that requires the production and assembly of thousands of different components or parts. The engine and the transmission are the major components that constitute a power train system. Although manufacturing processes of an engine are similar, the layouts of the manufacturing lines are different from factory to factory. It is due to the different design concept that how to combine the serial and parallel structures. In this paper, three engine lines of different factories are introduced, and the simulation technology is used to make the performance analysis for different design concepts.

• Journal of the Society of Naval Architects of Korea
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• v.49 no.5
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• pp.425-432
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• 2012

Viscous flow fields of side-by-side arranged two-dimensional floating bodies are numerically simulated by a Navier-Stokes equation solver. Two identical bodies with a narrow gap are forced to heave and sway motions. Square and rounded bilge hull forms are compared to find out the effects of vortex shedding on damping force. Wave height, force RAOs, added mass and damping coefficients including non-diagonal cross coefficients are calculated and a similarity between the wave height and force RAOs is discussed. CFD which can take into account of viscous damping and vortex shedding shows better results than linear potential theory.

• The Transactions of the Korea Information Processing Society
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• v.5 no.8
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• pp.1985-1996
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• 1998

A parallelising algorithm for partitioning and mapping methods of matrix/vector multiplication into linear processor array/VLW simulator is presented in this paper. First we discuss the mapping methods for input matrix or vector into the arbitrarily size of processor arrays. Then, we show partitioning the algorithmss of the large size of computational problem into the size of the processor array. We execute the algorithm on VLIW simuhator and show to effectiviness of algorithm. The result which we achived better parallelising performance on our VLIW simulator dsign than on linear processor array.