• Title/Summary/Keyword: 반도체 Test

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Characteristics of Laser Wafer Dicing (레이저를 이용한 웨이퍼 다이싱 특성)

  • Lee, Young-Hyun;Choi, Kyung-Jin;Yoo, Seung-Ryeol
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.3 s.16
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    • pp.5-10
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    • 2006
  • This paper investigates cutting qualities after laser dicing and predicts the problems that can be generated by laser dicing. And through 3 point bending test, die strength is measured and the die strength after laser dicing is compared with the die strength after mechanical sawing. Laser dicing is chiefly considered as an alternative to overcome the defects of mechanical sawing such as chipping on the surface and crack on the back side. Laser micromachining is based on the thermal ablation and evaporation mechanism. As a result of laser dicing experiments, debris on the surface of wafer is observed. To eliminate the debris and protect the surface, an experiment is done using a water soluble coating material and ultrasonic. The consequence is that most of debris is removed. But there are some residues around the cutting line. Unlike mechanical sawing, chipping on the surface and crack on the back side is not observed. The cross section of cutting line by laser dicing is rough as compared with that by mechanical sawing. But micro crack can not be seen. Micro crack reduces die strength. To measure this, 3 point bending test is done. The die strength after laser dicing decreases to a half of the die strength after mechanical sawing. This means that die cracking during package assembly can occur.

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Improvement of Transparent Electrodes Based on Carbon Nanotubes Via Corona Treatment on Substrate Surface (기판의 코로나 표면처리에 의한 탄소 나노튜브 투명전극의 물성 향상)

  • Han, Sang-Hoon;Kim, Bu-Jong;Park, Jin-Seok
    • Journal of the Semiconductor & Display Technology
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    • v.13 no.1
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    • pp.7-12
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    • 2014
  • In this study, we investigate the effects of corona-discharge pre-treatment on the properties of carbon nanotubes (CNTs) which are used as flexible transparent electrodes. The CNTs are deposited on PET (polyethylene terephthalate) substrates using a spray coating method. Prior to the deposition of CNTs, the PET substrates are corona-treated by varying the feeding directions of the PET substrate and the numbers of treatments. The variations in the surface morphologies and roughnesses of the PET substrates due to corona-treatment are characterized via atomic force microscopy (AFM). Dynamic contact angles (DCAs) of the corona-treated PET substrates are measured and analyzed as functions of the treatment conditions. Also, the sheet resistances and visible-range transmittances of the CNTs deposited on PET substrates are measured before and after bending test. The experimental results obtained in this study provide strong evidences that the adhesive forces between CNTs and PET substrates can be substantially enhanced by corona-discharge pretreatment.

EPG User Interface Via Multiple Programmable Attribute Values Specified (복수의 프로그램 속성 값 지정을 통한 EPG User Interface)

  • Yoon, Jeong-Shick
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.4
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    • pp.61-66
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    • 2015
  • With the start of digital broadcasting, TV screen, there is provided a new broadcast service is called EPG (Electronic Program Guide) that can be retrieved directly to a channel or program. However, a study considering the EPG of the user interface on the viewer position is so far insufficient. TV is because everyone watching the media, rather than a specific layer is necessary in order to find easy, intuitive user interface for the program to the viewer. That is, it is possible to quickly find the program to select the attributes that the TV viewer can be easily understood by using the EPG. To this end, this paper first genres which are representative of the properties that distinguish a TV program, time, rating, etc. were systematically classified. So viewers the values of the properties but to specify organized by the EPG, the order of attributes that specify the value we design a user interface that can be selected as having easy. And compare the superiority of the function evaluation of the two through the EPG in the EPG Usability Test proposed by the EPG with the existing commercial paper.

A Parallel Structure of SRAMs in embedded DRAMs for Testability (테스트 용이화를 위한 임베디드 DRAM 내 SRAM의 병열 구조)

  • Gook, In-Sung;Lee, Jae-Min
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.3 no.3
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    • pp.3-7
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    • 2010
  • As the distance between signal lines in memories of high density ICs like SoCs decreases rapidly, failure occurs more frequently and effective memory test techniques are needed. In this paper, a new SRAM structure is proposed to decrease test complexity and test time for embedded DRAMs. In the presented technique, because memory test can be handled as a single port testing and read-write operation is possible at dual port without high complexity, test time can be much reduced.

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A Layout Comparison Study for Improving Semiconductor Fab System (반도체 공정시스템 개선을 위한 레이아웃 비교 연구)

  • Suh, Jung-Dae
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.5
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    • pp.1074-1081
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    • 2009
  • The importance of improving semiconductor fab layout has been increased with the necessity of a large-scale capital investment and the increase of manufacturing complexity of the system. For the present, most semiconductor fab takes the form of a bay type layout where the same types of machines has been laid at the same bay. The bay type layout has many disadvantages in respect of material flow control even though it has merits of flexibility. To overcome the drawbacks of the bay type layout, a new room type semiconductor layout which integrates bays without a center spine and maintains the flexibilities of the bay type has been presented and compared with existing layouts. The results of test show that the room type layout is superior to the existing layouts from standpoints of transportation number and time, foot-print, number of stocker being passed and material flow time.

A Study on Throughput Increase in Semiconductor Package Process of K Manufacturing Company Using a Simulation Model (시뮬레이션 모델을 이용한 K회사 반도체 패키지 공정의 생산량 증가를 위한 연구)

  • Chai, Jong-In;Park, Yang-Byung
    • Journal of the Korea Society for Simulation
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    • v.19 no.1
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    • pp.1-11
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    • 2010
  • K company produces semiconductor package products under the make-to-order policy to supply for domestic and foreign semiconductor manufacturing companies. Its production process is a machine-paced assembly line type, which consists of die sawing, assembly, and test. This paper suggests three plans to increase process throughput based on the process analysis of K company and evaluates them via a simulation model using a real data collected. The three plans are line balancing by adding machines to the bottleneck process, product group scheduling, and reallocation of the operators in non-bottleneck processes. The evaluation result shows the highest daily throughput increase of 17.3% with an effect of 2.8% reduction of due date violation when the three plans are applied together. Payback period for the mixed application of the three plans is obtained as 1.37 years.

Ag Sintering Die Attach Technology for Wide-bandgap Power Semiconductor Packaging (Wide-bandgap 전력반도체 패키징을 위한 Ag 소결 다이접합 기술)

  • Min-Su Kim;Dongjin Kim
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.1
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    • pp.1-16
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    • 2023
  • Recently, the shift to next-generation wide-bandgap (WBG) power semiconductor for electric vehicle is accelerated due to the need to improve power conversion efficiency and to overcome the limitation of conventional Si power semiconductor. With the adoption of WBG semiconductor, it is also required that the packaging materials for power modules have high temperature durability. As an alternative to conventional high-temperature Pb-based solder, Ag sintering die attach, which is one of the power module packaging process, is receiving attention. In this study, we will introduce the recent research trends on the Ag sintering die attach process. The effects of sintering parameters on the bonding properties and methodology on the exact physical properties of Ag sintered layer by the realization 3D image are discussed. In addition, trends in thermal shock and power cycle reliability test results for power module are discussed.

Study on the Manufacturing of Compact Electronic Shaker for Vibration Test (진동 시험용 소형 전자식 가진기 제작에 관한 연구)

  • Joo, Kangwo;Lee, Jaegyoung;Lee, Bonggun;Yoon, Hyejun;Kim, Kwang sun
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.1
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    • pp.31-37
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    • 2015
  • This paper is on the design and manufacturing of vibration tester (shaker) for experiments about effects on the performance of semiconductor chips and Li-ion batteries by vibration. Shaker in the market are quite expensive, it is difficult for basic researchers to contact. In this study, in order to improve this, we designed and manufactured with an entry-level into mass production possible approaches in terms of performance required to a minimum. The shaker system is operated by Matlab and LabView. The target performances are 200Hz frequency and 5% error, and these were satisfied.

처짐저감을 위한 OLED 증착 마스크-프레임 구조체

  • Mun, Byeong-Min;Jeong, Nam-Hui;Jo, Chang-Sang;Kim, Guk-Won
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2007.06a
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    • pp.164-168
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    • 2007
  • Deformation of a shadow mask is one of the problems encountered during the deposition of organic materials for manufacturing large size OLED. The larger the glass substrate, the larger the shadow mask becomes. But as the size of the shadow mask increases, its deformation becomes more severe, thereby making it difficult to deposit organic materials in a precise pattern on a substrate. In this paper, a new type mask-frame structure is proposed. The proposed mask-frame structure making a curved mask has the ability of reducing drooping of mask. The test frame is fabricated and evaluation experiments are performed.

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An experimental study of Incompressible time based mass flow controller (비압축성 시간식 질량유량계의 특성에 관한 연구)

  • Chang, Young-Chul
    • Journal of the Semiconductor & Display Technology
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    • v.7 no.3
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    • pp.55-58
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    • 2008
  • The objective of this research is to design, manufacture and test a mass flow controller capable of measuring compressible as well as incompressible fluid flows based on a 'bucket and stop-watch' method. The basic principle behind such a system is the measurement of time, where the time taken to fill and empty a bucket of known volume is measured. This device should be able to handle fluid flows in the range of 0.1 ml/min to 10 ml/min within an accuracy of ${\pm}$1%. For the flow meter to be able to compete with established designs, it must be not only comparable in cost and robustness, but also very accurate and reliable as well.

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