• Journal of the Korea Society of Computer and Information
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• v.18 no.9
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• pp.1-10
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• 2013

In this paper, we implement the SIFT(Scale-Invariant Feature Transform) algorithm for feature point extraction using a many-core processor, and analyze the performance, area efficiency, and system area efficiency of the many-core processor. In addition, we demonstrate the potential of the proposed many-core processor by comparing the performance of the many-core processor with that of high-performance CPU and GPU(Graphics Processing Unit). Experimental results indicate that the accuracy result of the SIFT algorithm using the many-core processor was same as that of OpenCV. In addition, the many-core processor outperforms CPU and GPU in terms of execution time. Moreover, this paper proposed an optimal model of the SIFT algorithm on the many-core processor by analyzing energy efficiency and area efficiency for different octave sizes.

• The Journal of the Acoustical Society of Korea
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• v.13 no.4
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• pp.77-85
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• 1994

In this study an adaptive algorithm with optimum convergence factor for steepest descent method is proposed, which controls automatically the filter order to take the appropriate level. So far, fixed order filters have been used when adaptive filter is employed according to the priori knowledge or experience in various adaptive signal processing applications. But, it is so difficult to know the filter order needed in real implementations that high order filters have to be performed. As a result, redundant calculations are increased in the case of high order filters. The proposed variable length optimum convergence factor (VLOCF) algorithm takes the appropriated filter order within the given one so that the redundant calculation is decreased to get the enhancement of convergence speed and smaller convergence error during the steady state. The proposed algorithm is evaluated to prove the validity by computer simulation for system Identification.

• Journal of the Korean Institute of Intelligent Systems
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• v.26 no.3
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• pp.202-207
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• 2016

Checkpoint placement is an effective fault tolerance technique against transient faults in which the task is re-executed from the latest checkpoint when a fault is detected. In this paper, we propose a new checkpoint placement strategy separating data saving and fault detection processes that are performed together in conventional checkpoints. Several fault detection processes are performed in one checkpoint interval in order to decrease the latency between the occurrence and detection of faults. We address the placement method of fault detection processes to maximize the probability of successful execution of a task within the given deadline. We develop the Markov chain model for a real-time task having the proposed checkpoints, and derive the optimal fault detection and checkpoint interval.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.6
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• pp.1409-1418
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• 1998

The recent audio CODEC(Coding/Decoding) algorithms are complex of several coding techniques, and can be divided into DSP tasks, controller tasks and mixed tasks. The traditional DSP processor has been designed for fast processing of DSP tasks only, but not for controller and mixed tasks. This paper presents a new architecture that achieves high throughput on both controller and mixed tasks of such algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates four algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates functional units (Multiplier, two ALUs, Load/Store Unit) in parallel via 4-issue super-scalar instruction structure. The performance evaluation of YSP-3 has been done through the implementation of the several DSP algorithms and the part of the AC-3 decoding algorithms.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.12
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• pp.2953-2960
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• 2014

In the field of image recognition, circle detection is one of the most widely used techniques. Conventional algorithms are mainly based on Hough transform, which is the most straightforward algorithm for detecting circles and for providing enough robust algorithm. However, it suffers from large memory requirements and high computational loads, and sometimes tends to detect incorrect circles. This paper proposes an optimal circle detection and approximation method which is applicable for inspecting fiber optic connector endface. The proposed method finds initial center coordinates and radius based on the initial edge lines. Then, by introducing the simplified K-means algorithm, the proposed method investigates a substitute-circle by minimizing the area of non-overlapped regions. Through extensive simulations, it is shown that the proposed method can improve the error rate by as much as 67% and also can reduce the computing time by as much as 80%, compared to the Hough transform provided by the OpenCV library.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.3
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• pp.527-534
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• 2023

Triple modular redundancy (TMR) systems can continue their mission by virtue of their structural redundancy even if one processor is attacked by faults. In this paper, we propose a new fault tolerance strategy by introducing checkpoints into the TMR system in which data saving and fault detection processes are separated while they corporate together in the conventional checkpoints. Faults in one processor are tolerated by synchronizing the state of three processors upon detecting faults. Simultaneous faults occurring to more than one processor are tolerated by re-executing the task from the latest checkpoint. We propose the checkpoint placement and fault detection strategy to maximize the probability of successful execution of a task within the given deadline. We develop the Markov chain model for the TMR system having the proposed checkpoint strategy, and derive the optimal fault detection and checkpoint interval.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.5
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• pp.527-535
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• 2003

In this paper, the performance of W-CDMA system with smart antenna is analyzed for angular spread in realistic wideband multipath channel. The realistic wideband channel is assumed, one of which is JTC channel model. And each multipath is assumed as a reflective wave from only one direction (only one cluster) in space. Several multipaths within one chip are distinguished into each one and the strongest signal is selected. As a result, the performance of the W-CDMA system with smart antenna in realistic wideband multipath channel has been considerably improved in proportion to the increase of angular spread.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.5
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• pp.123-128
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• 2012

In order to overcome the hardware complexity and performance limit problems, recently the multi-core architecture has been prevalent. For hardware simplicity, usually RISC processor is adopted as the unit core processor. However, if the performance of unit core processor is enhanced, the overall performance of the multi-core processor architecture can be further enhanced. In this paper, in-order superscalar processor is utilized as the core for the multi-core processor architecture. Using SPEC 2000 benchmarks as input, the trace-driven simulation has been performed for the number of superscalar cores between 2 and 16 and the window size of 4 to 16 extensively. As a result, the 16-core superscalar processor for the window size of 16 results in 8.4 times speed up over the single core superscalar processor. When compared with the same number of cores, the multi-core superscalar processor performance doubles that of the multi-core RISC processor.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.2
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• pp.47-55
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• 2003

In this paper, the performance of DS-CDMA system with smart antenna is analyzed for different bandwidths (1.25MHz,5MHz) and different channel environments (rural, urban) in wideband multipath channel. For the analysis of smart antenna system, the vector channel having the spatio-temporal correlation is modeled as a time-variant linear filter in time, and each multipath is assumed as a reflective wave from only one direction (only one cluster) in space. Several multipath is within one chip are distingushed into each one and the strongest signal is selected, DS-CDMA system with smart antenna using wider bandwidth present better performance than that using narrow bandwidth. It is shown that the smart antenna is more effective in urban area when using 2D-RAKE receiver.

• Proceedings of the Korea Water Resources Association Conference
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• 2011.05a
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• pp.62-62
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• 2011

한강하구지역의 강화해협은 한강, 임진강과 예성강의 강물이 흘러들어오는 하구형 수로로서 폭이 좁고, 유속이 매우 빠른 특성을 갖는다. 또한 조류(潮流)의 영향을 강하게 받아 상당량의 유량을 경기만으로 내보내고, 한강의 상류로부터 유입되는 상당량의 물질이 하구로 운반되어 침전하여 쌓이거나 하류의 외해로 배출하는 역할을 한다. 본 연구에서는 한강하류부에 위치한 강화해협의 유 무에 따른 한강과 임진강의 흐름특성 변화를 분석하였다. 수치모의를 위해 복잡한 하구지역의 물의 흐름해석이 가능한 일차원적인 모델링 도구인 MIKE 11 모형을 이용하여 정류 및 부정류 해석을 실시하였다. 상류경계조건은 홍수 시 방류량이 크게 증가하는 홍수기 유량과 조위의 영향을 많이 받는 평수기 시 유량으로 설정하였고, 하류경계조건은 평수기를 비롯하여 홍수기에도 임진강과 한강의 유량에 영향을 미치는 서해 조위로 설정하였다. 강화해협의 폐쇄에 따른 수위 변화의 영향은 홍수기 시 실제 강우 사상을 모의 하였을 때 최대 8.21% 수위가 상승하였으며, 200년 빈도 계획홍수량을 모의한 결과로는 정류 해석의 경우 최대 8.25%의 변화율을 보였고, 부정류 해석의 경우 최대 13.08%의 변화율을 보였다. 평수기는 창조기에 수위 변화가 적었던 반면 낙조기에는 창조기에 비해 수위 변동이 심하게 일어나는 것으로 나타났다. 추후 강화해협 뿐만 아니라 해양생태계의 중요한 가치를 지니고 있는 한강하구의 다른 수로에 의한 영향을 분석함으로써 수로의 중요성을 평가하고, 2차원 수치해석 등을 통한 다양한 분석을 실행하여, 홍수 및 해양환경 훼손으로부터 하구 환경을 보호하는 보다 정량적인 대응체계가 정립되어야할 것으로 사료된다.