• Journal of Korea Multimedia Society
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• v.13 no.9
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• pp.1272-1284
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• 2010

As the mobile computers are becoming powerful and are used like general-purpose computers, operating systems for mobile computers also require swap system functionality that utilizes main memory efficiently. Flash memory is widely used as storage device for mobile computers but current linux swap system does not consider flash memory. Swap system is tightly related with process execution since it stores the contents of process in execution. By taking advantage of this characteristics, in this paper, we study a new linux swap system called PASS(Process-Aware Swap System), which allocates the different flash memory blocks to each process. Trace-driven experimental results show that PASS outperforms existing linux swap system with existing garbage collection schemes in terms of garbage collection cost.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.33-40
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• 2008

As the speed of memory is improved vey fast the advanced test equipments are needed to test the ultra-high speed memory devices efficiently. It is necessary to develop the Algorithmic Pattern Generator (ALPG) that tests fast memory devices effectively using the instructions that testers want to use. In this paper, we propose a new parallel ALPG for the ultra-high speed memory testing. The proposed ALPG can generate patterns for fast memory devices at high speed using manual instructions by the Instruction Analyzer.

• KIPS Transactions on Software and Data Engineering
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• v.7 no.8
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• pp.307-324
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• 2018

Recently, recurrent neural networks have been attracting attention in solving prediction problem of sequential data through structure considering time dependency. However, as the time step of sequential data increases, the problem of the gradient vanishing is occurred. Long short-term memory models have been proposed to solve this problem, but there is a limit to storing a lot of data and preserving it for a long time. Therefore, research on memory-augmented neural network (MANN), which is a learning model using recurrent neural networks and memory elements, has been actively conducted. In this paper, we describe the structure and characteristics of MANN models that emerged as a hot topic in deep learning field and present the latest techniques and future research that utilize MANN.

• The Transactions of the Korea Information Processing Society
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• v.3 no.6
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• pp.1433-1442
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• 1996

Data distribution of SPMD(Single Program Multiple Data) pattern is one of main features of HPF (High Performance Fortran). This paper describes design is sues for such data distribution and its efficient execution model on TICOM IV computer, named SPAX(Scalable Parallel Architecture computer based on X-bar network). SPAX has a hierarchical clustering structure that uses distributed shared memory(DSM). In such memory structure, it cannot make a full system utilization to apply unanimously either SMDD(shared Memory Data Distribution) or DMDD(Distributed Memory Data Distribution). Here we propose another data distribution model, called DSMDD(Distributed Shared Memory Data Distribution), a data distribution model based on hierarchical masters-slaves scheme. In this model, a remote master and slaves are designated in each node, shared address scheme is used within a node and message passing scheme between nodes. In our simulation, assuming a node size in which system performance degradation is minimized,DSMDD is more effective than SMDD and DMDD. Especially,the larger number of logical processors and the less data dependency between distributed data,the better performace is obtained.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.328-335
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• 2005

bIn this paper, built-in self-repair(BISR) is proposed for semiconductor memories. BISR is consisted of BIST(Buit-in self-test) and BIRU(Built-In Remapping Uint). BIST circuits are required not oがy to detect the presence of faults but also to specify their locations for repair. The memory rows are virtually divided into row blocks and reconfiguration is performed at the row block level instead of the traditional row level. According to the experimental result, we can verify algorithm for replacement of faulty cell.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.8
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• pp.1448-1455
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• 2008

This paper designs Shared Memory on the Dual Core system so that it operates a general System V IPC on the Linux O.S. Shared Memory is the technique that many processes can access to identical memory area. We treat Shared Memory in this paper among big two branches of Shared Memory which are SVR in a kernel step format. We design a share memory facility of Linux operating system on the Dual Core System. In this paper the suggesting design plan of share memory facility in Dual Core system is enhancing the performance in existing unity processor system as a dual core practical use. We attempt a performance enhance in each CPU for each process which uses a share memory.

• Proceedings of the Korean Information Science Society Conference
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• 2002.04b
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• pp.352-354
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• 2002

메모리 재활용 방법 (gabage collection)은 안전하고 효율적이지만, 메모리를 재사용하려면 항상 메모리를 수거해야 하는 비용이 든다. 가능하면 메모리 수거없이 즉각적으로 메모리를 재사용하게 함으로써 비용을 줄일 수 있다. 본 논문에서는 실행시간 정보 전달을 통해 효과적으로 메모리를 즉각 재사용할 수 있는 방법을 제시하고, 그러한 메모리 재사용이 안전하다는 것을 증명하는 메모리 타입 시스템을 제시한다. 제시한 방법을 사용하여 프로그램 sieve를 28.1% 빠르게 실행할 수 있었다..

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.2
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• pp.75-84
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• 2005

This research is to design a high performance NAND-type flash memory package with a smart buffer cache that enhances the exploitation of spatial and temporal locality. The proposed buffer structure in a NAND flash memory package, called as a smart buffer cache, consists of three parts, i.e., a fully-associative victim buffer with a small block size, a fully-associative spatial buffer with a large block size, and a dynamic fetching unit. This new NAND-type flash memory package can achieve dramatically high performance and low power consumption comparing with any conventional NAND-type flash memory. Our results show that the NAND flash memory package with a smart buffer cache can reduce the miss ratio by around 70% and the average memory access time by around 67%, over the conventional NAND flash memory configuration. Also, the average miss ratio and average memory access time of the package module with smart buffer for a given buffer space (e.g., 3KB) can achieve better performance than package modules with a conventional direct-mapped buffer with eight times(e.g., 32KB) as much space and a fully-associative configuration with twice as much space(e.g., 8KB)

• The Transactions of the Korea Information Processing Society
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• v.13 no.3
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• pp.91-101
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• 2024

The utilization of container virtualization technology ensures the consistency and portability of data-intensive and memory volatile workflows. Kubernetes serves as the de facto standard for orchestrating these container applications. Cloud users often overprovision container applications to avoid container restarts caused by resource shortages. However, overprovisioning results in decreased CPU and memory resource utilization. To address this issue, oversubscription of container resources is commonly employed, although excessive oversubscription of memory resources can lead to a cascade of container restarts due to node memory scarcity. Container restarts can reset operations and impose substantial overhead on containers with high memory volatility that include numerous stateful applications. This paper proposes a technique to mitigate container restarts in a memory oversubscription environment based on Kubernetes. The proposed technique involves identifying containers that are likely to request memory allocation on nodes experiencing high memory usage and temporarily pausing these containers. By significantly reducing the CPU usage of containers, an effect similar to a paused state is achieved. The suspension of the identified containers is released once it is determined that the corresponding node's memory usage has been reduced. The average number of container restarts was reduced by an average of 40% and a maximum of 58% when executing a high memory volatile workflow in a Kubernetes environment with the proposed method compared to its absence. Furthermore, the total execution time of a container workflow is decreased by an average of 7% and a maximum of 13% due to the reduced frequency of container restarts.

• Journal of KIISE:Databases
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• v.34 no.2
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• pp.133-140
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• 2007

Flash memory has penetrated our life in various forms. For example, flash memory is important storage component of ubiquitous computing or mobile products such as cell phone, MP3 player, PDA, and portable storage kits. Behind of the wide acceptance as memory is many advantages of flash memory: for instances, low power consumption, nonvolatile, stability and portability. In addition to mentioned strengths, the recent development of gigabyte range capacity flash memory makes a careful prediction that the flash memory might replace some of storage area dominated by hard disks. In order to have overwriting function, one block must be erased before overwriting is performed. This difference results in the cost of reading, writing and erasing in flash memory[1][5][6]. Since this difference has not been considered in traditional buffer replacement technologies adopted in system software such as OS and DBMS, a new buffer replacement strategy becomes necessary. In this paper, a new buffer replacement strategy, reflecting difference I/O cost and applicable to flash memory, suggest and compares with other buffer replacement strategies using workloads as Zipfian distribution and real data.