• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.4
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• pp.730-736
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• 2008

We proposed and implemented new DDC system which overcomes the difficulties including lack of flexibility of modifications of frequency which is the problem of previous frequence oscillator and synchronization. New DDC system can create frequence in two decimal points. Moreover, due to its usage in adjusting to frequence clock which is required by many consumers, laser distance instrument can reduce its error; thus, implementation of system is capable of high precision distance measurement can be performed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.10 s.89
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• pp.952-960
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• 2004

PSK(Phase Shift Keying) is useful because of the power and spectral efficient modulation. In this paper, no additional hardware will be needed to support various transmit mode in the suggested DSP scheme. We design and implement the synchronization algorithm for M-ary PSK(M=2, 4) demodulator based on DSP scheme, instead of complex analog PSK demodulator. TMS320C6203 is used as DSP. We check the all kinds of waveforms via the graph view window after software programming the emulation on the DSP tool. The result of implementation proves that demodulator using the suggested algorithm has equal performance with demodulator using analog circuits.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.3
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• pp.1-8
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• 2000

This paper presents a simulation model of the Quadrature detector to demodulate FSK signal, which is widely used in wireless paging system for its simple hardware implementation and economics of It fabrication. Quadrature detecter has nonlinear phase characteristic for changes linear changes of input signal frequency. So until now Quadrature detector system analysis remained a difficult problem and performance analysis has not been carried out adequately On these backgrounds, this paper presents the FSK signal demodulation process using Quadrature detector and optimal performance derived from digital simulation technique. First, PSN(Phase Shift Network) which is composed of analog RLC tank circuit is transformed into its equivalent digital transfer function using First-order-hold theorem. Though the demodulated outputs of the Quadrature detector for 4FSK are 4-level signals, only 2 comparators are used and it is shown that optimal performance can be obtained by choosing operation parameter Q value and threshold level decision which are proposed herein.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.2
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• pp.194-200
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• 2003

In this paper, FSK(Frequency Shift Keying) demodulator which is widely used for FH-SS system is designed and the experimental results are analyzed. The performance of the ADPLL(All-digital Phase-Locked-Loop), which is the main part of the demodulator circuit, is analyzed by the computer program. Using Maxplus-II tool provided by altera. co., ltd, each part of the ADPLL is designed and all of them is integrated into EPM7064SLC44-10 chip. And the simulation results are compared with the characteristics of the implemented circuits for analysis. There is about 2${\mu}\textrm{s}$ difference in time constant of the PLL. This difference is not critical in the demodulator. And the experimental results show that the transmitted data is well demodulated when the phase difference between the FSK modulated signal and the reference signal is about 180 degree.

• Journal of Sensor Science and Technology
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• v.9 no.6
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• pp.416-423
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• 2000

A new demodulation technique which can be used for the fiber optic acoustic sensor system using Sagnac interferometer is described. The theoretical limitation in dynamic range of the quadrature demodulation technique can be removed by the proposed BPSK(Binary Phase Shift Keying) demodulation technique. Full demodulation of input acoustic signal is possible with just simple electronics by eliminating the necessity of the high frequency phase modulation. This technique is suitable for digital signal processing of fiber optic sensor systems and can be applicable for other interferometers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.9A
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• pp.2141-2152
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• 1998

In this paper, we design and implement an indoor wireless modem using small signal of ISM band regulation, which can tranceive reliable data streams. We use direct sequence spead spectrum (DS-SS) signaling with synchronous BPSK and QPSK modulation, convolutional coding with viterbi decoding. The radio frequency module uses frequency devision duplexing in 900 MHz band, and the digital module is implemented with FPGAs for the purpose fo ASIC design. The perfomrance of our own acquistion and tracking circuit consisting digital matched filter and decision logic is proved by experiments, and the possibility of file transfer at indoor environment with the entrie system that the modem is connected the PC through RS-232C port is verified.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.4
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• pp.773-778
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• 2007

In order to resolve problems with the phase error in QPSK demodulator of the digital satellite broadcasting systems, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the complexity of implementation is reduced by the reduction into half of the number of the multiplier in Inter structure of the conventional carrier recovery loop, and as the drawback of NCO of the conventional carrier recovery loop wastes a amount of power for the structure of lookup table, We designed the structure of combinational logic without the lookup table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the lookup table is $175{\mu}W$, NCO with the proposed structure is $24.65{\mu}W$. As the result, it is recognized that about one eight of loss power is reduced. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.1
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• pp.11-21
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• 1989

In this paper, a GMSK modulator was implemented with a gaussian lowpass filter using digital signal processing, a phase integration, D/A convers and auxiliary circuits. The relatively narrow bandwidth of power spectrum of the GMSK modulator is observed when the cut off frequency (B T) of the gaussian baseband filter is varied. In a demodulator, a discriminator type circuit is used. Using the above degital radio GMSK modem, BER is theoretically derived and experimentally measured when 16Kbps PRBS data is transmitted under Rayleigh fading and additive white gaussian noise conditions.

• Journal of Broadcast Engineering
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• v.9 no.4 s.25
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• pp.357-370
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• 2004

In this paper we propose Digital Signal Processing (DSP) techniques for the Equalization Digital On-Channel Repeater(EDOCR) in the ATSC digital TV (DTV) System. DSP techniques consist of demodulation. baseband equalization, and remodulation. Since the time delay caused by signal processing in the EDOCR can seriously affect the performance of ATSC legacy receivers, it is required that the processing time should be minimized as much as possible. To achieve this goal, we focus on the reduction of the EDOCR's time delay with the minimization of its performance degradation. In addition, we present recommended proper parameters for hardware implementation based on extensive simulation result.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1A
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• pp.27-33
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• 2000

Gardner’s algorithm is one of the useful algorithm for NDD(Non-Decision Directed) symbol synchronization in PAM communications. But the algorithm has a weak point such as pattern noises increasing in multi-level PAM. To insert a pre-filter in the algorithm is able to reduce timing jitter and pattern noise. In this paper, we analyze statistical properties of NDD algorithm to find an optimal parameter of the pre-filter for improving timing jitter and PLL locking. As a simulation result, optimum value of pre-filter parameter, $\beta$, is 0.3 and 0.5 at the roll off factor of the channel, $\alpha$, is 0.5 and 1.0, respectively. Optimum parameters of the pre-filter for clock synchronization of all-digital 256-QAM demodulator is shown in the results.