• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.68-77
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• 2006

In accommodating the asymmetric traffic for future wireless multimedia services, the dynamic time division duplexing (D-TDD) scheme is considered as one of the key solutions. With the D-TDD mode, however, the inter-BS and inter-MS interference is inevitable during the cross time slot (CTS) period, and this interference seriously degrades the system performance. To mitigate such interference, we propose a region and time partitioning D-TDD architecture for OFDM systems. Each time slot in the CTS period is split into several minislots, and then each cell is divided into as many regions as the number of minislots per time slot. We then assign the minislots only to the users in its predefined corresponding region. On top of such architecture which inherently separates the interfering entities farther from each other, we design a robust time slot allocation scheme so that the inter-cell interference can be minimized. By the computer simulation, it has been verified that the proposed scheme outperforms the conventional time slot allocation methods in both the outage probability and the bandwidth efficiency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.21-31
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• 2010

This paper presents a design of PLL and SSCG for reducing the EMI effect at the electronic machinery and tools for DisplayPort application. This system is composed of the essential element of PLL and Charge-Pump2 and Reference Clock Divider to implement the SSCG operation. In this paper, 270MHz/162MHz dual-mode PLL that can provide 10-phase and 1.35GHz/810MHz PLL that can reduce the jitter are designed for 2.7Gbps/162Gbps DisplayPort application. The jitter can be reduced drastically by combining 270MHz/162MHz PLL with 2-stage 5 to 1 serializer and 1.35GHz PLL with 2 to 1 serializer. This paper propose the frequency divider topology which can share the divider between modes and guarantee the 50% duty ratio. And, the output current mismatch can be reduced by using the proposed charge-pump topology. It is implemented using 0.13 um CMOS process and die areas of 270MHz/162MHz PLL and 1.35GHz/810MHz PLL are $650um\;{\times}\;500um$ and $600um\;{\times}\;500um$, respectively. The VCO tuning range of 270 MHz/162 MHz PLL is 330 MHz and the phase noise is -114 dBc/Hz at 1 MHz offset. The measured SSCG down spread amplitude is 0.5% and modulation frequency is 31kHz. The total power consumption is 48mW.

• Journal of IKEEE
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• v.22 no.1
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• pp.127-135
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• 2018

This paper was studied the tri-band folded monopole antenna design with Mu-negative metamaterial unit cell, which operates at 700 MHz UHD broadcast band and 2.45 GHz/5 GHz WiFi band. The MNR metamaterial is fabricated by forming a capacitor on the backside of the antenna substrate and connecting it to the ground plane through a strip line and a via hole so that a single cell can operate in the MZR (Mu zero resonator). Through this, the resonance point can be controlled to resonate in the zero mode in 700 MHz band, and the bandwidth is improved. Experimental results show that the 10dB bandwidth and gain are 309 MHz (41.2%) and 5.298 dB at the first resonance point, and the 10dB bandwidth and gain at the second resonance point are 821.9 MHz (33.5%) and 2.7840 dB respectively. At the third resonance point, the gain and bandwidth were 1.1314 GHz (20.6%) and 2.9484 dB respectively. We confirmed that the resonance point with theoretical value is in agreement with experimental value. And the radiation pattern is generally omnidirectional, and it has been confirmed that the radiation pattern is good in both forward and backward directions at 0.75 GHz and 2.45 GHz, and has a radiation pattern with multiple lobes at 5.5 GHz.