• Title/Summary/Keyword: 논리최적화

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A Study on the Highly Parallel Multiple-Valued Logic Circuit Design using by the DCG (DCG에 의한 고속병렬다치논리회로설계에 관한 연구)

  • 변기녕;최재석;박춘명;김흥수
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.6
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    • pp.20-29
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    • 1998
  • This paper proposes the algorithms that design the highly parallel multiple-valued logic curcuit and assign the code to each node of DCG(Directed Cyclic Graph) of length 1. The conventional Nakajima's algorithm have some problems, so this paper introduce the matrix equation from DCG of length 1 and proposes circuit design algorithms according to the DCG of length 1. Using the proposed circuit design algorithms in this paper, it become realized that was not able to design from Nakajima's algorithm. Also, making a comparision between the circuit design using Nakajima's algorithm and this paper's, we testify that proposed paper's algorithm is able to realize more optimized circuit design. According to proposed curcuit design algorithm in this paper, it is possible to design curcuit that DCG have natural number, so it have the following advantages; reduction of the curcuit input/output digits, simplification of curcuit composition, reduction of computation time and cost. And we show compatibility and verification about this paper's algorithm.

Data Model, Query Language, and Indexing Scheme for Structured Video Documents (구조화된 비디오 문서의 데이터 모델 및 질의어와 색인 기법)

  • 류은숙;이규철
    • Journal of Korea Multimedia Society
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    • v.1 no.1
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    • pp.1-17
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    • 1998
  • Video information is an important component of multimedia systems such as Digital Library, World-Wide Web (WWW), and Video-On-Demand (VOD) service system. Video information has hierarchical document structure inherently, so it is named "structure video document" in this paper. This paper proposes a data model, a query language, and an indexing scheme for structured video documents in order to store, retrieve, and share video documents efficiently. In representing structured video documents, the object-oriented data modeling technique is used since the hierarchical structure information can be modeled as complex objects. We also define object types for the structure information. Our query language supports not only content-based retrieval, which means the queries based on the structure of video documents, and spatial/temporal relation for video documents. In order to perform structure queries efficiently, as well as to reduce the storage overhead of indices, an optimized inverted index structure is proposed.

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A Control of Inverted pendulum Using Genetic-Fuzzy Logic (유전자-퍼지 논리를 사용한 도립진자의 제어)

  • 이상훈;박세준;양태규
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.5
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    • pp.977-984
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    • 2001
  • In this paper, Genetic-Fuzzy Algorithm for Inverted Pendulum is presented. This Algorithms is combine Fuzzy logic with the Genetic Algorithm. The Fuzzy Logic Controller is only designed to two inputs and one output. After Fuzzy control rules are determined, Genetic Algorithm is applied to tune the membership functions of these rules. To measure of performance of the designed Genetic-Fuzzy controller, Computer simulation is applied to Inverted Pendulum system. In the simulation, In the case of f[0.3, 0.3] Fuzzy controller is measured that maximum undershoot is $-5.0 \times 10^{-2}[rad]$, maximum undershoot is $3.92\times10^{-2}[rad]$ individually however, Designed algorithm is zero. The Steady state time is approximated that Fuzzy controller is 2.12[sec] and designed algorithm is 1.32[sec]. The result of simulation, Resigned algorithm is showed it's efficient and effectiveness for Inverted Pendulum system.

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Improvement of Control Performance of Array-Sensor System Using Soft Computing (Soft Computing을 이용한 배열 센서 시스템의 제어 성능 개선)

  • Na, Seung-You;Ahn, Myung-Kook
    • Journal of Sensor Science and Technology
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    • v.12 no.2
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    • pp.79-87
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    • 2003
  • In this paper, we propose a method to obtain a linear characteristic using soft computing for systems which have array sensors of nonlinear characteristics. Also a procedure utilizing the pattern information of array sensors without additional sensors is proposed to reduce disturbance effects. For a typical example, even a single CdS cell for CdS array has nonlinear characteristics. Overall linear characteristic for CdS array is obtained using fuzzy logic for each cell and overlapped portion. In addition, further improvement for linearization is obtained applying genetic algorithms for the parameters of membership functions. Also the effect of disturbing external light changes to the CdS array can be reduced without using any additional sensors for calibration. The proposed method based on fuzzy logic shows improvements for position measurements and disturbance reduction to external light changes due to the fuzziness of the shadow boundary as well as the inherent nonlinearity of the CdS array. This improvement is shown by applying the proposed method to the ball position measurements of a magnetic levitation system.

Logic Synthesis Algorithm for TLU-Type FPGA (TLU형 FPGA를 위한 기술 매핑 알고리즘)

  • Park, Jang-Hyeon;Kim, Bo-Gwan
    • The Transactions of the Korea Information Processing Society
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    • v.2 no.5
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    • pp.777-786
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    • 1995
  • This paper describes several algorithms for technology mapping of logic functions into interesting and popular FPGAs that use look-up table memories. In order to improve the technology mapping for FPGA, some existing multi-level logic synthesis, decomposition reduction and packing techniques are analyzed and compared. And then new algorithms such as node-pair decomposition, merging fanin, unified reduction and multiple output decomposition which are used for combinational logic design, are proposed. The cost function is used to minimize the number of CLBs and edges of the network. The cost is a linear combination of each weight that is given by user. Finally we compare our new algorithm with previous logic design technique[8]. In an experimental comparison our algorithm requires 10% fewer CLB and nets than SIS-pga.

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Forming Shop Analysis with Adaptive Systems Approach (적응시스템 접근법을 이용한 조선소 가공공장 분석)

  • Dong-Hun Shin;Jong-Hun Woo;Jang-Hyun Lee;Jong-Gye Shin
    • Journal of the Society of Naval Architects of Korea
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    • v.39 no.3
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    • pp.75-80
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    • 2002
  • In these days of severe struggle for existence, the world has changed a great deal to global and digital oriented period. The enterprises try to introduce new management and production system to adapt such a change. But, if the only new technologies are applied to an enterprise without definite analysis about manufacturing, failure fellows as a logical consequence. Hence, enterprise must analyze manufacturing system definitely and needs new methodologies to mitigate risk. This study suggests that the new approach, which is systems approach for process improvement, is organized to systems analysis, systems diagnosis, and systems verification. Systems analysis analyzes manufacturing systems with object-oriented methodology-UML(Unified Modeling language) from a point of product, process, and resource view. Systems diagnosis identifies the constraints to optimize the system through scientific management or TOC(Theory of constraints). Systems verification shows the solution with virtual manufacturing technique applied to the core problem which emerged from systems diagnosis. This research shows the artifacts to improve the productivity with the above methodology applied to forming shop. UML provides the definite tool for analysis and re-usability to adapt itself to environment easily. The logical tree of TOC represents logical tool to optimize the forming shop. Discrete event simulator-QUEST suggests the tool for making a decision to verify the optimized forming shop.

A study on the design of an efficient hardware and software mixed-mode image processing system for detecting patient movement (환자움직임 감지를 위한 효율적인 하드웨어 및 소프트웨어 혼성 모드 영상처리시스템설계에 관한 연구)

  • Seungmin Jung;Euisung Jung;Myeonghwan Kim
    • Journal of Internet Computing and Services
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    • v.25 no.1
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    • pp.29-37
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    • 2024
  • In this paper, we propose an efficient image processing system to detect and track the movement of specific objects such as patients. The proposed system extracts the outline area of an object from a binarized difference image by applying a thinning algorithm that enables more precise detection compared to previous algorithms and is advantageous for mixed-mode design. The binarization and thinning steps, which require a lot of computation, are designed based on RTL (Register Transfer Level) and replaced with optimized hardware blocks through logic circuit synthesis. The designed binarization and thinning block was synthesized into a logic circuit using the standard 180n CMOS library and its operation was verified through simulation. To compare software-based performance, performance analysis of binary and thinning operations was also performed by applying sample images with 640 × 360 resolution in a 32-bit FPGA embedded system environment. As a result of verification, it was confirmed that the mixed-mode design can improve the processing speed by 93.8% in the binary and thinning stages compared to the previous software-only processing speed. The proposed mixed-mode system for object recognition is expected to be able to efficiently monitor patient movements even in an edge computing environment where artificial intelligence networks are not applied.

Management System of On-line Mode Client-cluster (온라인 모드 클라이언트-클러스터 운영 시스템)

  • 박제호;박용범
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.4 no.2
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    • pp.108-113
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    • 2003
  • Research results have demonstrated that conventional client-server databases have scalability problem in the presence of many concurrent clients. The multi-tier architecture that exploits similarities in clients' object access behavior partitions clients into logical clusters according to their object request pattern. As a result, object requests that are served inside the clusters, server load and request response time can be optimized. Management of clustering by utilizing clients' access pattern-based is an important component for the system's goal. Off-line methods optimizes the quality of the global clustering, the necessary cost and clustering schedule needs to be considered and planned carefully in respect of stable system's performance. In this paper, we propose methods that detect changes in access behavior and optimize system configuration in real time. Finally this paper demonstrates the effectiveness of on-line change detection and results of experimental investigation concerning reconfiguration.

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A Study on the Highly Parallel Multiple-Valued Logic Circuit Design with DTG Properties (DTG의 性質을 갖는 高速竝列多値論理回路의 設計에 관한 硏究)

  • Na, Gi-Su;Shin, Boo-Sik;Choi, Jai-Sok;Park, Chun-Myoung;Kim, Heung-Soo
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.6
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    • pp.27-36
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    • 1999
  • This paper proposes algorithms that design the highly parallel multiple-valued logic circuit of DTG(Directed Tree Graph) to be represented by tree structure relationship between input and output of nodes. The conventional Nakajima's algorithms have some problems so that this paper introduce the concept of mathematical analysis based on tree structure to design optimized locally computable circuit. Using the proposed circuit design algorithms in this paper it is possible to design circuit in that DTG have any node number - not to design by Nakajima's algorithms. Also, making a comparison between the circuit design using Nakajim's algorithms and this paper's, we testify that proposed algorithms in this paper optimizes circuit design all case of DTG. Some examples are shown to demonstrate the usefulness of the circuit design algorithm.

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Delay Optimization Algorithm for the High Speed Operation of FPGAs (FPGA를 고속으로 동작시키기 위한 지연시간 최적화 알고리듬)

  • Choi, Ick-Sung;Lee, Jeong-Hee;Lee, Bhum-Cheol;Kim, Nam-U
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.7
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    • pp.50-57
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    • 2000
  • We propose a logic synthesis algorithm for the design of FPGAs operating at high speed. FPGA is a novel technology that provides programmability in the field. Because of short turnaround time and low manufacturing cost, FPGA has been noticed as an ideal device for system prototyping. Despite these merits, FPGA has drawbacks, namely low integration and long delay time comparing to ASIC. The proposed algorithm partitions a given circuit into subcircuits utilizing a kernel divisor such that the subcircuits can be performed at the same time, hence reducing the delay of the circuit. Experimental results on the MCNC benchmark show that the proposed algorithm is effective by generating circuits having 19.1% les delay on average, when compared to the FlowMap algorithm.

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