• Title/Summary/Keyword: 내장 시스템

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A LSB-based Efficient Selective Encryption of Fingerprint Images for Embedded Processors (임베디드 프로세서에 적합한 LSB 기반 지문영상의 효율적인 부분 암호화 방법)

  • Moon, Dae-Sung;Chung, Yong-Wha;Pan, Sung-Bum;Moon, Ki-Young;Kim, Ju-Man
    • Journal of Korea Multimedia Society
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    • v.9 no.10
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    • pp.1304-1313
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    • 2006
  • Biometric-based authentication can provide strong security guarantee about the identity of users. However, security of biometric data is particularly important as the compromise of the data will be permanent. In this paper, we propose a secure and efficient protocol to transmit fingerprint images from a fingerprint sensor to a client by exploiting characteristics of fingerprint images. Because the fingerprint sensor is computationally limited, however, such encryption algorithm may not be applied to the full fingerprint images in real-time. To reduce the computational workload on the resource-constrained sensor, we apply the encryption algorithm to a specific bitplane of each pixel of the fingerprint image. We use the LSB as specific bitplane instead of MSB used to encrypt general multimedia contents because simple attacks can reveal the fingerprint ridge information even from the MSB-based encryption. Based on the experimental results, our proposed algorithm can reduce the execution time of the full encryption by a factor of six and guarantee both the integrity and the confidentiality without any leakage of the ridge information.

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Trend analysis of Smart TV and Mobile Operating System (모바일 운영체제와 스마트 TV 동향 분석)

  • Bae, Yu-Mi;Jung, Sung-Jae;Jang, Rae-Young;Park, Jeong-Su;Kyung, Ji-Hun;Sung, Kyung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.740-743
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    • 2012
  • The initial role of the operating system acts as an intermediary between the computer and the user, and, hardware and process management, and the convenience of your computer system is to use. Of these operating systems as well as servers and personal computers, smartphones and tablet mounted on mobile devices such as mobile operating system was born. Mobile Operating System has been expanded a TV or Car Area that built into a simple embedded operating system, is emergence of a variety of devices, cloud services, combined with the desire of users due to the high built-in simple embedded operating system that was working on a TV or a car is expanding to the area. The reason for the emergence of a variety of devices, cloud services, combined with the desire of users is high. In this paper, the mobile operating system, N-Screen, Smart TV to find out about and through the analysis of the major smart TV, the future Find out about trends in the mobile operating system.

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Model Validation of a Fast Ethernet Controller for Performance Evaluation of Network Processors (네트워크 프로세서의 성능 예측을 위한 고속 이더넷 제어기의 상위 레벨 모델 검증)

  • Lee Myeong-jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.92-99
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    • 2005
  • In this paper, we present a high-level design methodology applied on a network system-on-a-chip(SOC) using SystemC. The main target of our approach is to get optimum performance parameters for high network address translation(NAT) throughput. The Fast Ethernet media access controller(MAC) and its direct memory access(DMA) controller are modeled with SystemC in transaction level. They are calibrated through the cycle-based measurement of the operation of the real Verilog register transfer language(RTL). The NAT throughput of the model is within $\pm$10% error compared to the output of the real evaluation board. Simulation speed of the model is more than 100 times laster than the RTL. The validated models are used for intensive architecture exploration to find the performance bottleneck in the NAT router.

Implementation of Power Line Modem Using a Direct Sequence Spread Spectrum Technique (직접대역확산 기법을 적용한 전력선 모뎀의 구현)

  • 송문규;김대우;사공석진;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.2
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    • pp.218-230
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    • 1993
  • A power line modem(PLM) which transfers data safely through power lines in houses or small offices is considered. When a power line is used for communications, transmitted signals could be affected by the channel characteristics such as frequency-selective fading, interference, and time-varying attenuation. In order to overcome these impairments, a direct sequence(DS) technique which is well known as an effective instrument against a variety of interferences and hostile channel properties is employed. Using a DS technique, however, requires more circuits such as PN code generator circuits, code modification circuits, and complicated synchronization circuits, and it also results in substantial acquisition delay. In this paper, some of these circuits are implemented via software programmed in the system controller, and the complicated synchronization circuits are replaced by simple circuits utilizing a 60 Hz power signal for synchronization. The synchronization ciruits used in this paper virtually eliminate the substantial acquisition delay, and is also designed to free influence of 60 Hz zero crossing jitters which reside in a power signal. As a result, a PLM using a DS technique is realized in the form of wall-socket plug, and the PLM hardware would be very much simplified.

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The Design of Hardware MPI Units for MPSoC (MPSoC를 위한 저비용 하드웨어 MPI 유닛 설계)

  • Jeong, Ha-Young;Chung, Won-Young;Lee, Yong-Surk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.1B
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    • pp.86-92
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    • 2011
  • In this paper, we propose a novel hardware MPI(Message Passing Interface) unit which supports message passing in multiprocessor system which use distributed memory architecture. MPI Hardware unit processes data synchronization, transmission and completion, and it supports processor non-blocking operation so it reduces overhead according to synchronization. Additionally, MPI hardware unit combines ready entry, request entry, reserve entry which save and manage the synchronized messages and performs the multiple outstanding issue and out of order completion. According to BFM(Bus Functional Model) simulation result, the performance is increased by 25% on many to many communication. After we designed MPI unit using HDL, with synopsys design compiler we synthesized, and for synthesis library we used MagnaChip $0.18{\mu}m$. And then we making prototype chip. The proposed message transmission interface hardware shows high performance for its increase in size. Thus, as we consider low-cost design and scalability, MPI hardware unit is useful in increasing overall performance of embedded MPSoC(Multi-Processor System-on-Chip).

A Fundamental Study on Leak Detection System for Water Supply Valve Using Smart Bolt (상수도 밸브 누수 탐지용 스마트 볼트 적용의 기초 연구)

  • Park, Chul;Kim, Young-seok;Jung, Hae-Wook;Choi, Sang-sik;Lee, Yong-Beom
    • Journal of the Society of Disaster Information
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    • v.16 no.1
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    • pp.144-154
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    • 2020
  • Purpose: This paper is a fundamental study on the applicability of the smart bolt developed for monitoring system to detect the leakage of water supply valve. Method: A leak detection experiments were conducted using the smart bolt having embedded strain sensors and accelerometer. The smart bolt used in study meets the allowable criteria of torque and tensile stress for water supply system, and it can be applied to a joint of the water supply valve by behaving well within the allowable limits. Result: As a result of the simulated leak tests, a leak signal at the valve leak point was detected in a band of 60Hz, and the main pipe leaking point was observed to produce a leak signal having much higher frequency than that of the valve leak point. This seems to result in a total coupled vibration under unconfined conditions of the pipes. Conclusion: The smart bolts appeared applicable to detecting a leaking signal from the water supply valve.

A Study on Dynamic Characteristics of Hydraulic Motor Brake System with Counter Balance Valve (카운터 밸런스 밸브를 내장한 유압 모터 브레이크 시스템의 동특성)

  • Yun, So-Nam;Lee, Ill-Yeong
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.29 no.3
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    • pp.214-219
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    • 1993
  • Counter balance valve is used as one part of hydraulic motor brake system. The function of this valve is to protect over-run or free falling of inertia load. But occasionally the brake system with counter balance valve makes some undesirable problems such as pressure surges or vibrations. These problems may hurt system safety and driver's conformability. Nevertheless, studies on dynamic characteristics of hydraulic system including counter balance valve are very rare, so further accumulation of research results are required. In this study, for the purpose of easy estimation about dynamic characteristics of hydraulic system including counter balance valve, precise formulation describing fluid dynamics and valve dynamics under various boundary conditions were made. The equations obtained in the preceding process include some parameters that must be got experimentally. Flow coefficients of valve and choke are the most significant ones among the parameters. So these parameters are obtained experimentally in this study, and experimental equations obtained from the experimental data were used for numerical calculation. The equations were analysed by numerical integration using Runge-Kutta method, because the equations contain various nonlinear terms. From the numerical analysis, it was verified that the dynamic response of counter balance valve and pressure variation at each elements can be estimated very easily. So the analysing method developed in this study enabled very easy estimating the relation between the performances of counter balance valve and various physical parameters related to the valve. Conclusively, it is said that the results obtained in this study can be used very usefully to develop a new type counter balance valve or to apply the valve to actual hydraulic system for various industrial equipments.

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Automated Generation of Wrapper to Test Components (컴포넌트 테스트를 위한 래퍼의 자동 생성에 관한 연구)

  • Song, Ho-Jin;Choi, Eun-Man
    • Journal of KIISE:Software and Applications
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    • v.32 no.8
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    • pp.704-716
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    • 2005
  • Assembling new software systems from Prepared components is an attractive alternative to traditional software development method to reduce development cost and schedule dramatically. However, if separately developed components are tested, integrated and verified with unreasonable effort and high cost, it would not be an effective way to software development. Components are not distributed in the shape of white-box source code so that should be hard to validate and test in new application environment. For solving this problem, built-in tester components are suggested to check the contract-compliance of their server components. If components have various and complex function, built-in tester should be heavy and unflexible to test in composition of components. This paper suggests enhancing automated wrapper technique which substitutes with built-in tester components and shows the usability of the wrapper by design and implementation. Component testing in this way reduces the cost and effort associated with preparation of component testing and makes the various test experiments in components assembly.

A Study on the Design of a RISC core with DSP Support (DSP기능을 강화한 RISC 프로세서 core의 ASIC 설계 연구)

  • 김문경;정우경;이용석;이광엽
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.11C
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    • pp.148-156
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    • 2001
  • This paper proposed embedded application-specific microprocessor(YS-RDSP) whose structure has an additional DSP processor on chip. The YS-RDSP can execute maximum four instructions in parallel. To make program size shorter, 16-bit and 32-bit instruction lengths are supported in YS-RDSP. The YS-RDSP provides programmability. controllability, DSP processing ability, and includes eight-kilobyte on-chip ROM and eight-kilobyte RAM. System controller on the chip gives three power-down modes for low-power operation, and SLEEP instruction changes operation statue of CPU core and peripherals. YS-RDSP processor was implemented with Verilog HDL on top-down methodology, and it was improved and verified by cycle-based simulator written in C-language. The verified model was synthesized with 0.7um, 3.3V CMOS standard cell library, and the layout size was 10.7mm78.4mm which was implemented by using automatic P&R software.

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Implementation of Context aware Learning System by Designing Ubiquitous Learning Space and OWL Context Model (유비쿼터스 학습공간과 OWL 상황 모델 설계를 통한 상황 인식 학습 시스템 구현)

  • Hong, Myoung-Woo;Lee, Young-Whan
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.6
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    • pp.99-109
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    • 2011
  • Ubiquitous computing technology makes an impact on the appearance of u-learning and presents an advanced direction of futuristic school education. In ubiquitous learning environments, various embedded computational devices will be pervasive and interoperable across the network for supporting the learning, so users may utilize these devices anytime anywhere. An important next step for ubiquitous learning is the introduction of context-aware learning service that employing knowledge and reasoning to understand the local context and share this information in support of intelligent learning services. However, the existing studies on design and application of ontology context model to support context-aware service in actual school environments are incomplete state. This paper, therefore, suggests a scheme of constructing ubiquitous learning space for existing school network by introducing USN to support context-aware ubiquitous learning services. This paper, also, designs an ontology based context model for ubiquitous school environments which describes context information through OWL. To determine the suitability of proposed ubiquitous learning space and ontology context model, we implement some of context-aware learning services in the ubiquitous learning environments.