• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.4
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• pp.71-78
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• 2005

This paper proposes a novel multi-level energy recovery sustaining driver for AC PDP(Plasma Display Panel), which solves the problems of the conventional multi-level sustaining driver. While the conventional circuit improves the voltage md current stress of the switching elements in Weber circuit not only there are parasitic resonant currents between resonant inductors and parasitic capacitance and hard switching, but also the changing period between 0 and sustain voltage is too long. Comparing the proposed circuit with the conventional circuit, the number of components are reduced and the parasitic resonant currents in resonant inductors are eliminated Moreover the hard switching problem is solved by using CIM(Current Injection Method) and the operating frequency will be high as much as possible by removing Vs/2 sustain period. And the circuit operations of the proposed circuit are analyzed for each mode and the validity is verified by the simulations using PSpice program.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.5
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• pp.223-230
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• 2014

In this paper, the single-fed microstrip parasitic array antenna for low-cost three-dimensional beam steering in 5.8GHz ISM(5.725GHz~5.825GHz) band is designed and implemented. The antenna is comprised of one feed active element and four passive elements with variable reactance loads. The beam steering range of implemented antenna is achieved three-dimensional beam steering of ${\pm}28^{\circ}$ at azimuth angle ${\Phi}=0^{\circ}$, ${\Phi}=45^{\circ}$, ${\Phi}=90^{\circ}$, and ${\Phi}=135^{\circ}$ by adjusting variable reactance loads. The maximum gain of the antenna in the beam steering range have within 7.23dBi~9.36dBi and the bandwidth of return loss lower than -10dB covers 5.8GHz ISM band regardless of the beam steering angles.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.202-202
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• 2010

최근 반도체 소자의 미세화에 따라, 단채널 효과에 의한 누설전류 및 소비전력증가 등이 문제가 되고 있다. DRAM의 경우, 캐패시터 영역의 축소문제가 소자집적화를 방해하는 요소로 작용하고 있다. 1T-DRAM은 기존의 DRAM과 달리 캐패시터 영역을 없애고 상부실리콘의 중성영역에 전하를 저장함으로써 소자집적화에 구조적인 이점을 갖는다. 또한 silicon-on-insulator (SOI) 기판을 이용할 경우, 뛰어난 전기적 절연 특성과 기생 정전용량의 감소, 소자의 저전력화를 실현할 수 있다. 본 연구에서는 silicon-germanium-on-insulator (SGOI) 기판을 이용한 1T-DRAM의 열처리온도에 따른 특성 변화를 평가하였다. 기존의 SOI 기판을 이용한 1T-DRAM과 달리, SGOI 기판을 사용할 경우, strained-Si 층과 relaxed-SiGe 층간의 격자상수 차에 의한 캐리어 이동도의 증가효과를 기대할 수 있다. 하지만 열처리 시, SiGe층의 Ge 확산으로 인해 상부실리콘 및 SiGe 층의 두께를 변화시켜, 소자의 특성에 영향을 줄 수 있다. 열처리는 급속 열처리 공정을 통해 $850^{\circ}C$와 $1000^{\circ}C$로 나누어 30초 동안 N2/O2 분위기에서 진행하였다. 그리고 Programming/Erasing (P/E)에 따라 달라지는 전류의 차를 감지하여 제작된 1T-DRAM의 메모리 특성을 평가하였다.

• Journal of IKEEE
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• v.24 no.3
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• pp.890-894
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• 2020

In this paper, we propose an ESD protection device with improved electrical characteristics through structural changes of LVTSCR, a typical ESD protection device. The proposed ESD protection device has a higher holding voltage than the existing LVTSCR by inserting a long N+ drift region and additional P-Well and N-Well, and improves the latch-up immunity, a chronic disadvantage of a general SCR-based ESD protection device. In addition, the effective base width of parasitic BJTs was set as a design variable, and the electrical characteristics of the proposed ESD protection device were verified through Synopsys' TCAD simulation so that it can be applied to the required application by applying the N-Stack technology.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.7
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• pp.737-746
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• 2014

Recently, researches about MIMO(Multi-Input Multi-Output) system are being studied actively due to high-capacity and high-speed communication. However, MIMO system has many RF(Radio Frequency) chains according to many array antennas. So, MIMO system has disadvantages such as high-complexity and high-power-consumption. Also, it is impossible to miniaturize the antenna dimension. In order to solve these problems, beamspace MIMO system using ESPAR(Electronically Steerable Parasitic Array Radiator) antenna was proposed. It is possible to reduce the complexity and the power-consumption, because it has single RF chain by using one active antenna and several parasitic elements. In this paper, in order to improve the security, for the first time, chaos communication algorithm is applied to QPSK modulated beamspace MIMO system using ESPAR antenna. We define as chaos QPSK beamspace MIMO system, and evaluate the SER performance. Also, we confirm that QPSK symbols can be made by changing the reactance values of parasitic elements, and evaluate the SER performance of this system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.5
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• pp.220-228
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• 2014

ESPAR(Electronically Steerable Parasitic Array Radiator) antenna is the technique for overcoming the problems of space limitation and energy efficiency due to the multiple RF-chain. Conventional MIMO system with multiple antenna requires a large number of RF-chain for transmitting the multiple data because it transmits the data in proportion to the number of antenna. Beamspace MIMO system using the ESPAR antenna which has single RF-chain was proposed for solving the problems caused by using the multiple antenna and RF-chain. In this paper, therefore we propose 2x2 beamspace MIMO system using the 16, 64-QAM modulation and evaluate the performance of this system to reveal that it is possible that beamspace MIMO system can use not only PSK modulation but also QAM modulation. We confirm that QAM symbol can be generated by adjusting reactance of parasitic elements and making reactance set and also we confirm that performance of beamspace MIMO system is similar to the conventional MIMO system by transmitting the QAM symbol made by reactance set through the simulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.1
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• pp.7-13
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• 2007

In this paper, we have designed and fabricated a small size wide-band monopole antenna which can integrate the frequency of previous business mobile communication system by adding 4 PCS of post type parasitic element on top-loaded sleeve monopole antenna. We have observed the properties of return loss upon a parameter change of element, and we also examined radiation properties in the band of PCS, W-CDMA, WiBro, W-LAN and S-DMB in order to make sure the suggested antenna's wide-band properties. We have found that the proposed antenna has omni-direction in horizontal plane and figure eight-direction in vertical plane, and we could have good return loss($Return\;loss{\leq}-10\;dB$) and $1.14{\sim}3.66\;dBi$ gain in $1.67{\sim}3.55\;GHz$ of frequency range($B/W{\fallingdotsep}72%$).

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.136-144
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• 2004

From the AC analysis results utilizing a two dimensional device simulator, the ac equivalent-circuit modeling of the ESD protection devices is executed. It is explained that the ac equivalent circuit of the NMOS protection transistor is modeled by a rather complicated form and that, depending on the frequency range, the error can be large if it is modeled by a simple RC serial circuit. It is also shown that the ac equivalent circuit of the thyristor-type pnpn protection device can be modeled by a simple RC serial circuit. Based on the circuit simulations utilizing the extracted equivalent circuits, the effects of the parasitics in the protection device on the characteristics of LNA are examined when the LNA, which is one of the important RF circuits, is equipped with the protection device. It is explained that a large error can result in estimating the circuit characteristics if the NMOS protection transistor is modeled by a simple capacitor. It is also confirmed that the degradation of the LNA characteristics by incorporating the ESD protection device can be reduced a lot by adopting the suggested pnpn device.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.4 s.119
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• pp.389-397
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• 2007

This paper proposes miniaturized broadband parasitic patch antenna. The proposed antenna consists of a probe fed reduced size main patch and U-shaped parasitic patches. The parasitic patches are incorporated to the radiating edges of the main patch to miniaturize the antenna size. The broadband impedance matching can be achieved by either E-plane or H-plane electromagnetic coupling between main patch and parasitic elements. The size of radiating elements is $18{\times}17.6\;mm^2$ and the overall dimension of designed antenna with substrate and ground plane is $25{\times}30{\times}4\;mm^3$. The fabricated antenna on a FR4 substrate shows two resonant frequencies(5.12 GHz and 6.08 GHz) with 27.3 %(1.5 GHz) fractional bandwidth at 5.5 GHz center frequency. The calculated and measured radiation patterns are almost similar to conventional patch antenna.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.96-102
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• 2009

This paper deals with gate drive and power IC for high power devices(600V/200A and 1200V/150A). The proposed gate driver provides high gate driving capability (4 A source, 8 A sink), and over-current protected by means of power transistor desaturation detection. In addition, soft-shutdown function is added to reduce voltage overshoots due to parasitic inductance. This gate drive If is designed, fabricated, and tested using the Dongbu hitek 0.35um BCDMOS process.