• Title/Summary/Keyword: 광메모리소자

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Reflective Bistable Chiral Splay Nematic Liquid Crystal Display (반사형 쌍안정 카이랄 스플레이 네마틱 액정표시소자)

  • Kim, Tae-Hyung;Lee, Joong-Ha;Shen, Zheng-Guo;Jang, Ji-Hyang;Kim, Jeong-Soo;Jhun, Chul-Gyu;Kwon, Soon-Bum;Yoon, Tae-Hoon;Kim, Jae-Chang
    • Korean Journal of Optics and Photonics
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    • v.22 no.1
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    • pp.23-29
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    • 2011
  • Bistable chiral splay nematic liquid crystal display (BCSN LCD) is a memory type liquid crystal display using splay and $-\pi$ twist states as two stable states. When the cell thickness to pitch (d/p) ratio is 0.25, splay and $-\pi$ twist states have permanent memory time. However, when the transition from $-\pi$ twist state to splay state is caused by a fringe field, pixel regions show that the splay state is not perfect, but rather includes a contribution from the $-\pi$ twist state. In this paper, we propose a reflective BCSN LCD using $-\pi$ twist state in which the two stable states do not coexist. The fabricated reflective BCSN LC cell shows a high contrast ratio of over 30:1 and response times of 950 ms and 450 ms in vertical and fringe field switching, respectively. The proposed cell also shows wide viewing angle characteristics of $180^{\circ}$ in left- and right directions.

그래핀 투명전도막의 전기적 특성에 미치는 Strain 영향

  • Lee, Byeong-Ju;Jeong, Gu-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.462-462
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    • 2011
  • 그래핀은 탄소원자로 구성된 원자단위 두께의 매우 얇은 2차원의 나노재료로서 높은 투광도 뿐만 아니라 우수한 기계적, 전기적 특성을 지니며 구조적 화학적 으로도 매우 안정한 것으로 알려져 있다. 이러한 그래핀을 얻는 방법에는 물리·화학적 박리법, 탄화규소의 흑연화, 열화학기 상증착법(thermal chemical vapor deposition; TCVD)등 많은 방법들이 존재한다. 이중 TCVD방법이 대면적으로 두께균일도가 높은 그래핀을 얻는데 가장 적합한 방법으로 알려져 있다. 한편 그래핀은 우수한 특성들을 기반으로 센서나 메모리와 같은 기능성 소자로 응용이 가능할 뿐 아니라 투명고분자 기판으로 전사함으로서 유연성 투명전극을 제작 가능하여 기존의 인듐산화물(indium tin oxide; ITO) 투명전극을 대체하여 디스플레이, 터치스크린, 전·자기 차폐재 등의 다양한 분야로의 응용이 가능하다고 예측되고 있다. 본 연구에서는 TCVD법을 이용하여 대면적으로 두께균일도가 높은 그래핀을 합성하여 투명 고분자 기판(polyethylene terephthalate; PET) 위에 전사하여 투명전도막을 제작한 후, 압축변형률(compressive strain)의 변화에 따른 전기적 특성 변화를 측정하였다. 그래핀은 300 nm 두께의 니켈박막이 증착된 산화물 실리콘 기판위에 원료가스로 메탄(CH4)을 사용하여 합성하였다. 합성 결과 단층 그래핀의 면적은 약 80% 이상이었으며, 합성된 그래핀은 분석의 용이함 및 향후 다양한 응용을 위하여 식각공정을 통해 산화막 실리콘 기판과 PET기판으로 전사하였다. PET기판 위로 전사하여 제작한 그래핀 투명전도막의 strain 인가에 따른 전기적 특성을 관찰한 결과, 약 20%의 비교적 높은 strain하에서도 전기적특성이 크게 변화하지 않는 것을 확인하였다. 그래핀의 특성분석을 위해서는 광학현미경, 라만 분광기, 투과전자현미경, 자외 및 가시선 분광광도계, 4탐침측정기 등을 이용하였다.

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Understanding Interfacial Charge Transfer Nonlinearly Boosted by Localized States Coupling in Organic Transistors (유기트랜지스터 내부 편재화 준위간 커플링에 의한 계면 전하이동의 비선형적 가속화 현상의 이해)

  • Han, Songyeon;Kim, Soojin;Choi, Hyun Ho
    • Journal of Adhesion and Interface
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    • v.22 no.4
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    • pp.144-152
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    • 2021
  • Understanding charge transfer across the interface between organic semiconductor and gate insulator gives insight into the development of high-performance organic memory as well as highly stable organic field-effect transistors (OFETs). In this work, we firstly unveil a novel interfacial charge transfer mechanism, in which hole transfer from organic semiconductor to polymer insulator was nonlinearly boosted by localized states coupling. For this, OFETs based on rubrene single crystal semiconductor and Mylar gate insulator were fabricated via vacuum lamination, which allows stable repetition of lamination and delamination between semiconductor and gate insulator. The surfaces of rubrene single crystal and Mylar film were selectively degraded by photo-induced oxygen diffusion and UV-ozone treatment, respectively. Consequently, we found that the interfacial charge transfer and resultant bias-stress effect were nonlinearly boosted by coupling between localized states in rubrene and Mylar. In particular, the small number of localized states in rubrene single crystal provided fluent pathway for interfacial charge transport.

Research Trend of High Aspect Ratio Contact Etching used in Semiconductor Memory Device Manufacturing (반도체 메모리 소자 제조에서 High Aspect Ratio Contact 식각 연구 동향)

  • Hyun-Woo Tak;Myeong-Ho Park;Jun-Soo Lee;Chan-Hyuk Choi;Bong-Sun Kim;Jun-Ki Jang;Eun-Koo Kim;Dong-Woo Kim;Geun-Young Yeom
    • Journal of Surface Science and Engineering
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    • v.57 no.3
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    • pp.165-178
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    • 2024
  • In semiconductor memory device manufacturing, the capability for high aspect ratio contact (HARC) etching determines the density of memory device. Given that there is no standardized definition of "high" in high aspect ratio, it is crucial to continuously monitor recent technology trends to address technological gaps. Not only semiconductor memory manufacturing companies such as Samsung Electronics, SK Hynix, and Micron but also semiconductor manufacturing equipment companies such as Lam Research, Applied Materials, Tokyo Electron, and SEMES release annual reports on HARC etching technology. Although there is a gap in technological focus between semiconductor mass production environments and various research institutes, the results from these institutes significantly contribute by demonstrating fundamental mechanisms with empirical evidence, often in collaboration with industry researchers. This paper reviews recent studies on HARC etching and the study of dielectric etching in various technologies.