• The Journal of the Acoustical Society of Korea
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• v.27 no.8
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• pp.427-434
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• 2008

In this paper, a transcoding algorithm for SMV and AMR speech coder is proposed. In the application requiring the interoperability of different networks, two speech coders must work together with the structure of cascaded connection, tandem. The tandem which is one of the simplest methods has several problems such as long delay, high complexity and the quality degradation due to twice complete encoding/decoding process. These problems can be solved by using transcoding algorithm. The proposed algorithm consists of LSP (Line Spectral Pair) conversion, pitch delay conversion, and fast fixed codebook search. The evaluation results show that the proposed algorithm achieves equivalent speech quality to that of tandem with reduced computational complexity and delay.

• Journal of Broadcast Engineering
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• v.18 no.3
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• pp.349-361
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• 2013

This paper proposes a fast face tracking method with only depth information. It is basically a template matching method, but it uses a early termination scheme and a sparse search scheme to reduce the execution time to solve the problem of a template matching method, large execution time. Also a refinement process with the neighboring pixels is incorporated to alleviate the tracking error. The depth change of the face being tracked is compensated by predicting the depth of the face and resizing the template. Also the search area is adjusted on the basis of the resized template. With home-made test sequences, the parameters to be used in face tracking are determined empirically. Then the proposed algorithm and the extracted parameters are applied to the other home-made test sequences and a MPEG multi-view test sequence. The experimental results showed that the average tracking error and the execution time for the home-made sequences by Kinect ($640{\times}480$) were about 3% and 2.45ms, while the MPEG test sequence ($1024{\times}768$) showed about 1% of tracking error and 7.46ms of execution time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.4C
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• pp.331-340
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• 2006

In this Paper, we propose to extend the TSS-LS(Two-Step Search scheme with Linear search based Second step) scheme which was already proposed by the authors for coherent UWB(Ultra Wide Band) systems, to rapid and reliable acquisition of noncoherent UWB systems in multipath channels. The proposed noncoherent TSS-LS employing simple energy window banks utilizes two different thresholds and search windows to achieve fast acquisition. Furthermore, the linear search is adopted for the second step in the proposed scheme to correctly find the starting point in the range of effective delay spread of the multipath channels, and to obtain reliable BER(Bit Error Rate) performance of the noncoherent UWB systems. Simulation results with multipath channel models by IEEE 802.15.3a show that the proposed two-step search scheme can achieve significant reduction of the required mean acquisition time as compared to general search schemes. ]n addition, the proposed scheme achieves quite good BER performance for large signal-to-noise ratios, which is favorably comparable to the case of ideal perfect timing.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.66-76
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• 2009

The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.

• Proceedings of the Korean Society of Computer Information Conference
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• 2009.01a
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• pp.215-218
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• 2009

본 논문에서는 웨이블릿 변환 된 고주파 서브밴드들의 에지 정보를 이용하여 관심 객체 영역을 고속으로 자동 검출해주는 새로운 알고리즘을 제안하였다. 제안된 방법에서는 에지정보를 이용하여 블록단위의 4-방향 객체 윤곽 탐색 알고리즘(4-DOBS)을 수행하여 관심객체를 검출한다. 전체 이미지는 $64{\times}64$ 또는 $32{\times}32$ 크기의 코드 블록으로 먼저 나누어지고, 각 코드 블록 내에 에지들이 있는지 없는지에 따라 관심 코드블록 또는 배경이 된다. 4-방향은 바깥쪽에서 이미지의 중앙으로 탐색하여 접근하며, 피사계 심도가 낮은 이미지는 중앙으로 갈수록 에지가 발견된다는 특징을 이용한다. 기존 방법들의 문제점 이였던 복잡한 필터링 과정과 영역병합 문제로 인한 높은 계산도를 상당히 개선시킬 수 있었다. 또한 블록 단위의 처리로 인하여 실시간 처리를 요하는 응용에서도 적용 가능 하였다.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.6
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• pp.99-105
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• 2014

The performance improvement in MPEG-4 AVC is provided at the expense for higher computational complexity. Most of the complexity is caused by Inter prediction. To improve coding efficiency, some functions are added in H.264/MPEG-4 AVC, such as variable block size motion compensation, multi reference frame and quarter-pel motion compensation. A fast macroblock partition decision method is proposed in this paper. The macroblock size is efficiently determined by using the pixel value difference between encoding and the referred macroblock.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1A
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• pp.99-106
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• 2004

In this Paper, the matched filter for searching initial synchronization in DSSS (direct sequence spread spectrum) receiver is studied. The matched filter with a single data flow path is described which can be presented by HDL (Hardware Description Language). In order to improve the processing time of operations for the filter, equations are arranged to represent two data flow paths and the associated hardware model is proposed. The model has an architecture based on parallelism and pipeline for fast processing, in which two data flow paths with a series of memory, multiplier and accumulator are placed in parallel. The performance of the model is analyzed and compared with the matched filter with a single data flow path.

• Journal of Sensor Science and Technology
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• v.6 no.2
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• pp.145-154
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• 1997

Based on a new search strategy using circuit simulation and simulated annealing with local search, a technique for design automation of high-performance operational amplifiers is proposed. For arbitrary circuit topology and performance specifications, through discrete optimization of a cost function with discrete design variables the design of operational amplifiers is performed. A special-purpose circuit simulator and some heuristics are used to reduce the design time. Through the design of a low-power high-speed fully differential CMOS operational amplifier usable in smart sensors and 10-b 25-MS/s pipelined A/D converters, it has been demonstrated that a design tool developed using the proposed technique can be used for designing high-performance operational amplifiers with less design knowledge and less design effort.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.37 no.6
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• pp.38-47
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• 2000

In pattern classification, the Bhattacharyya distance has been used as a class separability measure. Furthemore, it is recently reported that the Bhattacharyya distance can be used to estimate error of Gaussian ML classifier within 1-2% margin. In this paper, we propose a feature extraction method utilizing the Bhattacharyya distance. In the proposed method, we first predict the classification error with the error estimation equation based on the Bhauacharyya distance. Then we find the feature vector that minimizes the classification error using two search algorithms: sequential search and global search. Experimental reslts show that the proposed method compares favorably with conventional feature extraction methods. In addition, it is possible to determine how man, feature vectors arc needed for achieving the same classification accuracy as in the original space.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.2
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• pp.235-242
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• 2012

In RFID System, one of the problem that we must slove is to devise a good anti-collision algorithms to improve the efficiency of tag identification which is usually low because of tag collision. Among of the existing RFID anti-collision algorithm, BS (Binary Search) algorithm, though simple, has a disadvantage that the stage of times used to identify the tags increase exponentially as the number of tags does. In this paper, I propose a new anti-collision algorithm called Multi-collision reflected frame which restricts the number of stages and decided bit. Since the proposal algorithm keep the length size of UID and density of total tag when have 100%. The simulation results showed that the proposed algorithm improves the efficiency by 30~50% compared to the existing algorithm.