• Title/Summary/Keyword: 경로레벨요소

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Bicyclists' Behavioral Characteristics and Impacts on Route Choice Using Stated Preference Survey in Commuting Time (통근시간대 자전거이용자의 이용행태특성 및 경로선택 영향요인 분석)

  • Lee, Jae-Yeong
    • Journal of Korean Society of Transportation
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    • v.28 no.5
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    • pp.77-87
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    • 2010
  • In the last five years, Korea has supplied many more bicycle facilities than in the last several decades combined. However, have bicyclists increased in proportion to investment? If bicyclists are avoiding existing bicycle related facilities, including off-road bicycle facilities, it could be because suppliers did not consider bicyclists' preferences in their planning process. In this paper, the authors tried to understand the bicyclists' behavioral and route choice characteristics using stated preference surveys and a logit model, using commuting time in Daejeon Metropolitan City, Korea. The results show that nine factors affect the route choice behavior of bicyclists. In particular, bicyclists preferred sub-arterial roads to off-road, dedicated bicycle facilities in residential area. It means that bicyclists like a seamless bicycle route and that a buffer zone between car lanes and bicycle lanes or 50 km/h speed limits for cars are necessary for bicycle lanes that are not physical separated.

Improving A Stealth Game Level Design Tool (스텔스 게임 레벨 디자인 툴의 개선)

  • Na, Hyeon-Suk;Jeong, Sanghyeok;Jeong, Juhong
    • Journal of Korea Game Society
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    • v.15 no.4
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    • pp.29-38
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    • 2015
  • In the stealth game design, level designers are to develop many interesting game environments with a variety of difficulties. J. Tremblay and his co-authors developed a Unity-based level design tool to help and automate this process. Given a map, if the designer inputs several game factors such as guard paths and velocities, their vision, and the player's initial and goal positions, then the tool visualizes simulation results including (clustered) possible paths a player could take to avoid detection. Thus with the help of this tool, the designer can ensure in realtime if the current game factors result in the intended difficulties and players paths, and if necessary adjust the factors. In this note, we present our improvement on this tool in two aspects. First, we integrate a function that if the designer inputs some vertices in the map, then the tool systematically generates and suggests interesting guard paths containing these vertices of various difficulties, which enhances its convenience and usefulness as a tool. Second, we replace the collision-detection function and the RRT-based (player) path generation function, by our new collision-check function and a Delaunay roadmap-based path generation function, which remarkably improves the simulation process in time-efficiency.

Scheduled Interest Table(SIT) based Multiple Path Configuration Technique in Ocean Sensor Network (해양 센서네트워크에서 Scheduled Interest Table(SIT) 기반 다중경로 설정 기법)

  • Yun, Nam-Yeol;NamGung, Jung-Il;Park, Soo-Hyun
    • Journal of the Korea Society for Simulation
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    • v.18 no.4
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    • pp.175-184
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    • 2009
  • The distance of sensor nodes is an important factor in having influence on capability of networks in underwater acoustic sensor networks. Our proposed scheme is to establish an efficient distance to design a route of communication in underwater environment and it proposes a Level scheme that the areas divided by transmit/receive distance in network are given different levels. Our proposed scheme is pursued research to maintain a established route and maximize an energy efficiency. The established route will have fluid modification by an internal and external factors and it will construct more robust underwater sensor networks over our proposed multiple path configuration scheme.

Two-Stage Evolutionary Algorithm for Path-Controllable Virtual Creatures (경로 제어가 가능한 가상생명체를 위한 2단계 진화 알고리즘)

  • Shim Yoon-Sik;Kim Chang-Hun
    • Journal of KIISE:Computer Systems and Theory
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    • v.32 no.11_12
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    • pp.682-691
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    • 2005
  • We present a two-step evolution system that produces controllable virtual creatures in physically simulated 3D environment. Previous evolutionary methods for virtual creatures did not allow any user intervention during evolution process, because they generated a creature's shape, locomotion, and high-level behaviors such as target-following and obstacle avoidance simultaneously by one-time evolution process. In this work, we divide a single system into manageable two sub-systems, and this more likely allowsuser interaction. In the first stage, a body structure and low-level motor controllers of a creature for straight movement are generated by an evolutionary algorithm. Next, a high-level control to follow a given path is achieved by a neural network. The connection weights of the neural network are optimized by a genetic algorithm. The evolved controller could follow any given path fairly well. Moreover, users can choose or abort creatures according to their taste before the entire evolution process is finished. This paper also presents a new sinusoidal controller and a simplified hydrodynamics model for a capped-cylinder, which is the basic body primitive of a creature.

The Convergence Design for Stiffness and Structure Advancement of Automotive Body (승용차 차체의 강도 구조 개선을 위한 융합설계)

  • Lee, Jeong-Ick
    • Journal of the Korea Convergence Society
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    • v.8 no.4
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    • pp.189-197
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    • 2017
  • In the design of an automotive structural component, one of the more important tasks for a design engineer is to determine the life of the component and to ensure that the component will not fail prematurely. In order to accomplish this, a design engineer will first use simple section analysis to come up with a section shape in the concept design stage and use more advanced analysis for stress level. At this stage, the analysis should focus on understanding overall behavior in terms of load paths and gross stress levels. A model that is adequate for a stiffness analysis of the structure will usually provide an adequate level of stress information in the design process. To perform a detailed stress analysis, the structure models must have the detailed local areas such as stress concentrations or force(or displacement) distributions. This paper is to present the design considerations for the stress analysis of automotive structure.

Learning Heuristics for Tactical Path-finding in Computer Games (컴퓨터 게임에서 전술적 경로 찾기를 위한 휴리스틱 학습)

  • Yu, Kyeon-Ah
    • Journal of Korea Multimedia Society
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    • v.12 no.9
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    • pp.1333-1341
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    • 2009
  • Tactical path-finding in computer games is path-finding where a path is selected by considering not only basic elements such as the shortest distance or the minimum time spend but also tactical information of surroundings when deciding character's moving trajectory. One way to include tactical information in path-finding is to represent a heuristic function as a sum of tactical quality multiplied by a weighting factor which is.. determined based on the degree of its importance. The choice of weighting factors for tactics is very important because it controls search performance and the characteristic of paths found. In this paper. we propose a method for improving a heuristic function by adjusting weights based on the difference between paths on examples given by a level designer and paths found during the search process based on the CUITent weighting factors. The proposed method includes the search algorithm modified to detect search errors and learn heuristics and the perceptron-like weight updating formular. Through simulations it is demonstrated how different paths found by tactical path-finding are from those by traditional path-finding. We analyze the factors that affect the performance of learning and show the example applied to the real game environments.

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High-level Modeling and Test Generation With VHDL for Sequential Circuits (상위레벨에서의 VHDL에 의한 순차회로 모델링과 테스트생성)

  • Lee, Jae-Min;Lee, Jong-Han
    • The Transactions of the Korea Information Processing Society
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    • v.3 no.5
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    • pp.1346-1353
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    • 1996
  • In this paper, we propose a modeling method for the flip-flops and test generation algorithms to detect the faults in the sequential circuits using VHDL in the high-level design environment. RS, JK, D and T flip-flops are modeled using data flow types. The sequence of micro-operation which is the basic structure of a chip-level leads to a control point where varnishing occurs to one of two micro- operation sequence. In order to model the fault of one micro-operation(FMOP) that perturb another micro-operation effectively, the concept of goal trees and some heuristic rules are used. Given a faulty FMOP or fault of control point (FCON), a test pattern is generated by fault sensitization, path sensitization and determination of the imput combinations that will justify the path sensitization. The fault models are restricted to the data flow model in the ARCHITECTURE statement of VHDL. The proposed algorithm is implemented in the C language and its efficiency is confirmed by some examples.

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A Identification of Malicious Node and Secure Communications in MANET (MANET에서 악의적인 노드 확인에 기반한 Secure 라우팅 방안)

  • Park Gun-Woo;Byeon Yong-Sung;Lee Seung-Chan;Ma Yong-Jae;Song Joo-Seok
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 2006.06a
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    • pp.749-753
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    • 2006
  • 최근 Mobile Ad-hoc Networks(MANET)에서 보안 요소를 추가한 라우팅 연구가 활발히 진행되어 왔다. 하지만 기존 연구들은 대부분 secure 라우팅 또는 패킷 자체에 대한 악의적인 행위가 이루어지는 부분 중 어느 한 측면에 대해서만 연구되어져 왔다. 이와 같은 방법들은 악의적인 노드를 확인하더라도 라우팅 경로 설정과정에서 악의적인 행위가 이루어지거나 라우팅 경로 설정에 대한 공격은 차단하더라고 패킷에 대한 악의적인 행위가 이루어지면 네트워크 내 보안 측면에서 큰 효율성을 기대할 수 없다. 따라서 본 논문에서는 일정기간 악의저인 행위가 이루어지는 노드를 확인하여 각 노드에 대한 신뢰단계를 구성 후, 획득한 각 노드의 신뢰레벨에 따라 라우팅 경로를 설정함으로써 패킷 및 라우팅 경로 설정에 대해 이루어질 수 있는 악의적인 행위를 효율적으로 대응 할 수 있는 방안인 IMSec(A identification of malicious node and secure communications in MANET)을 제안한다. IMSec은 AODV(Ad-hoc On-demand Distance Vector Routing)를 기반으로 하였다. NS-2 네트워크 시뮬레이션 결과를 통해, 제안된 IMSec은 기존 프로토콜보다 네트워크의 부하를 감소시킨 상태에서 악의적인 노드를 더 정확하고 신속하게 찾아냄을 보였다.

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The Effects of the Wave Propagation Path of Ground Vibration Induced by the Subway Train on the Reduction of Vibration Level (지하철 주변 지반진동의 전파경로가 진동레벨 감쇠에 미치는 영향)

  • Shin, Han-Chul;Cho, Sun-Kyu;Yang, Shin-Chu;Lee, Jong-Min
    • Journal of the Korean Society for Railway
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    • v.12 no.5
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    • pp.631-640
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    • 2009
  • In this paper, Numerical analysis was conducted to study on the reduction of ground vibration level induced by subway train. The analytical results indicated that the soil properties were the predominant factor affecting the ground vibration when the tunnel was located in the soil layer. On the other hand, the rock properties were the predominant one when the tunnel was located in the rock layer. The effects of the angle between the vertical line of vibration source and the receive point on the reduction of vibration level were also evaluated. There were little difference in the reduction of vibration level when the receive point was located within $30^{\circ}$. The vibration level, however, rapidly decreased when the angle between the two points was larger than $40^{\circ}$.

A Model-based Methodology for Application Specific Energy Efficient Data path Design Using FPGAs (FPGA에서 에너지 효율이 높은 데이터 경로 구성을 위한 계층적 설계 방법)

  • Jang Ju-Wook;Lee Mi-Sook;Mohanty Sumit;Choi Seonil;Prasanna Viktor K.
    • The KIPS Transactions:PartA
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    • v.12A no.5 s.95
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    • pp.451-460
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    • 2005
  • We present a methodology to design energy-efficient data paths using FPGAs. Our methodology integrates domain specific modeling, coarse-grained performance evaluation, design space exploration, and low-level simulation to understand the tradeoffs between energy, latency, and area. The domain specific modeling technique defines a high-level model by identifying various components and parameters specific to a domain that affect the system-wide energy dissipation. A domain is a family of architectures and corresponding algorithms for a given application kernel. The high-level model also consists of functions for estimating energy, latency, and area that facilitate tradeoff analysis. Design space exploration(DSE) analyzes the design space defined by the domain and selects a set of designs. Low-level simulations are used for accurate performance estimation for the designs selected by the DSE and also for final design selection We illustrate our methodology using a family of architectures and algorithms for matrix multiplication. The designs identified by our methodology demonstrate tradeoffs among energy, latency, and area. We compare our designs with a vendor specified matrix multiplication kernel to demonstrate the effectiveness of our methodology. To illustrate the effectiveness of our methodology, we used average power density(E/AT), energy/(area x latency), as themetric for comparison. For various problem sizes, designs obtained using our methodology are on average $25\%$ superior with respect to the E/AT performance metric, compared with the state-of-the-art designs by Xilinx. We also discuss the implementation of our methodology using the MILAN framework.