• Title/Summary/Keyword: 결정궤환 등화기

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DOA estimation based beamforming technique for DTV reception performance enhancement (입사각 추정 기반 빔형성을 이용한 DTV 수신성능 개선)

  • 문성훈;한동석
    • Journal of Broadcast Engineering
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    • v.8 no.2
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    • pp.136-145
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    • 2003
  • This paper proposes a DTV receiver using beamforming techniques to improve indoor and mobile reception. The proposed DTV receiver estimates the directions of arrival (DOAs) of incoming signals using Capon's DOA estimation method and generates an adaptive antenna beam pattern to the estimated DOA of the mainpath signal to Improve the channel condition. After beamforming, a following decision feedback equalizer (DFE) removes the remaining multipath components. The proposed receiver can be implemented with a conventional DTV receiver without anymodification. The performance of the proposed receiver is analyzed with modified Brazilian field test models, which include DOA information of Incoming signals. Simulation results show that the proposed receiver can satisfy the threshold of visibility (TOV) when input signal to noise ratio is slightly over 10 dB.

The Performance Analysis of Equalizer for Next Generation W-LAN with OFDM System (OFDM 방식의 차세대 무선 LAN 환경에서 등화기의 성능 분석)

  • Han, Kyung-Su;Youn, Hee-Sang
    • Journal of Advanced Navigation Technology
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    • v.6 no.1
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    • pp.44-51
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    • 2002
  • This paper describes the performance evaluation and analysis of an Orthogonal Frequency-Division Multiplexing (OFDM) system having the least Inter Symbol Interference (ISI) in a multi-path fading channel environment. Wireless Local Area Network (W-LAN) in accordance with IEEE 802.11a and IEEE 802.11b provides high-speed transmission to universities, businesses and other various places. In addition, service providers can offer a public W-LAN service on restricted areas such as a subway. The proliferation of W-LAN has led to greater W-LAN service demands, but problems are also on the rise in offering a good W-LAN service. In particular, urban areas with high radio wave interference and many buildings are vulnerable to deteriorated QoS including disconnected data and errors. For example, when high-speed data is transmitted in such areas, the relatively high frequency generates ISI between Access Points (AP) and Mobile Terminals (such as a notebook computer), leading to a frequency selective fading channel environment. Consequently, it is difficult to expect a goodW-LAN service. The simulation proves that the OFDM system enables W-LAN to implement QoS in high-speed data transmission in a multi-path fading channel environment. The enhanced OFDM performance with 52 sub-carriers is verified via data modulation methods such as BPSK, QPSK and 16QAM based on IEEE 802.11a and punched convolutional codes with code rate of 1/2 and 3/4 and constraint length of 7. Especially, the simulation finds that the OFDM system has better performance and there is no data disconnection even in a mobile environment by applying a single tap equalizer and a decision feedback equalizer to a mobile channel environment with heavy fading influence. Given the above result, the OFDM system is an ideal solution to guarantee QoS of the W-LAN service in a high-speed mobile environment.

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A modified FDTS/DF for considering nonlinear distortion in digital magnetic recording channels (디지탈 자기 기록 채널의 비선형 왜곡을 고려한 개선된 FDTS/DF)

  • 오대선;전원기;양원영;조용수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.7
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    • pp.1734-1745
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    • 1996
  • In this paper, a modified fixed-delay tree search with decision feedback(FDTS/DF) for compensation of non-linear distortion in digital magnetic recording channels is discussed. Since the nonlinear distortion, which becomes significant as recording density increases, is generally well modeled by the discrete Volterra series, the proposed equlizer is composed of a nolinear feedforward filter, a linear feedback filter, and a nonlinear distorton table, the values of which are determined by considering the effect of nonlinear distortion due to future data as well as the previous and current one. At the decision stage of FDTS, a path minimizing the branch metric is chosen by using the previously detected values, current predicted value, and future predicted value. We compare the performance of the linear FDTS/DF, the previous nonlinear FDTS/DF, and the proposed nonlinear FDTS/DF by computer simulation, and confirm that the proposed one chieves the best performance at high-density recording.

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Fixed Decision Delay Detector for Intersymbol Interference Channel (심볼간 간섭 채널을 위한 고정 지연 신호 검출기)

  • Taehyun, Jeon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.9
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    • pp.39-45
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    • 2004
  • A design method is proposed for the sequence detection with fixed decision delay with less hardware complexity using the concept of the Voronoi diagram and its dual, the Delaunay tessellation. This detector design is based on the Fixed Delay Tree Search (FDTS) detection. The FDTS is a computationally efficient sequence detection algerian and has been shown to achieve near-optimal performance in the severe Intersymbol Interference (ISI) channels when combined with decision feedback equalization and the appropriate channel coding. In this approach, utilizing the information contained in the Voronoi diagram or equivalently the Delaunay tessellation, the relative location of the detector input sequence in the multi-dimensional Euclidean space is found without any computational redundancy, which leads to a reduced complexity implementation of the detector.

Adaptive Channel Estimation and Decision Directed Noise Cancellation in the Frequency Domain Considering ICI of Digital on Channel Repeater in the T-DMB (T-DMB 동일 채널 중계기의 주파수 영역에서 ICI를 고려한 적응형 채널 추정과 결정지향 잡음 제거)

  • Kim, Gi-Young;Ryu, Sang-Burm;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.4
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    • pp.491-498
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    • 2012
  • Recently, many papers have been proposed in order to improve the OFDM system performance in T-DMB DOCR (Digital On Channel Repeater), by using removing the feedback signal so that the transmitter power can be increased or by using the equalizer to remove ICI. Despite these efforts, however, signal quality at the receiving terminal has not been improved because of constellation smearing in T-DMB DOCR. In this paper, in order to suppress constellation smearing, we propose an effective equalizer algorithm that can improve system performance. We perform adaptive channel estimation and non-coherent decision directed noise cancellation method that can estimate the channel subsequently during data symbols period in the frequency domain. So we can obtain better quality of the signal at the receiving terminal. In order to secure QoS(Quality of Service) required in T-DMB handsets, we evaluate SNR and BER in T-DMB DOCR(Digital On Channel Repeater) and verified by simulation. In this simulation results, this system is satisfied the performance of BER=$10^{-5}$ at less than SNR=14 dB at the receiver after compensation of phase noise -18 dBc.

Design of a High Speed Asymmetric Baseband MODEM ASIC Chip for CATV Network (CATV 망용 고속 비대칭 기저대역 모뎀 ASIC 칩 설계)

  • 박기혁
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.9A
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    • pp.1332-1339
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    • 2000
  • This paper presents the architecture and design of a high speed asymmetric data transmission baseband MODEM ASIC chip for CATV networks. The implemented MODEM chip supports the physical layer of the DOCSIS(Data Over Cable Service Interface Specification) standard in MCNS(Multimedia Cable Network System) The chip consists of a QPSK/16-QAM transmitter and a 64/256-QAM receiver which contain a symbol timing recovery circuit, a carrier recovery circuit, a blind equalizer using MMA and LMS algorithms. The chip can support data rates of 64Mbps at 256 QAM and 48Mbps at 64-QAM and can provide symbol rates up to 8MBaud. This symbol rate is faster than existing QAM receivers. We have performed logic synthesis using the $0.35\mu\textrm{m}$ standard cell library. The total number of gates is about 290,000 and the implemented chip is being fabricated and will be delivered soon.

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