• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.9 s.100
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• pp.855-861
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• 2005

Two-dimensional orthogonal variable spreading codes are presented far multiplexing of forward link in direct sequence code division multiple access(DS-CDMA) multiple antennas system. The bit error rate(BER) performance under a multi-user environment fur the additive white Gaussian noise(AWGN) channel and Rayleigh fading MIMO channel are evaluated. The results demonstrate that the proposed scheme could provide flexible rates and lower peak correlation values.

• Proceedings of the IEEK Conference
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• 2000.06a
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• pp.17-20
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• 2000

This paper addresses a novel algorithm for variable rate channel coding with interleaver punctured convolutional code for wireless communication. In other to increase the coding performance and achieve the variable channel coding rate, serially concatenated convolutional coding scheme will be applied. In this paper, we characterize the effect of interleaver puncturing on the effectiveness of the proposed scheme some simulation results are presented, in which the channel model of additive Gaussian noise is assumed.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.51-54
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• 2001

지금까지의 비트 율 조절에 대한 연구는 일정한 프레임 율을 갖는다는 가정 하에서 매크로 블록 단에서의 연구가 대부분이었다. 그러나 저 전송률 환경에서는 사용 할 수 있는 bit 수가 적기 때문에 오히려 이러한 가정이 성능을 저하시킬 수 있다. 우리는 이 논문에서 저 전송률 환경에서 문제가 되는 motion jerkiness 와 flickering effort 를 개선시키고 프레임 skip 을 방지하는 비트율 조절 방법을 제안한다. 제안된 기법은 허용하는 지연 시간 안에서 부호화단에 부가적인 계산량을 거치 부가하지 않기 때문에 실시간 처리에 적합하다. 실험 결과는 우리의 기법이 저 전송률 환경에 적함함을 보여준다.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.549-552
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• 2003

In this paper, an efficient architecture of a versatile Reed-Solomon (RS) decoder is designed, where the message length k as well as the block length n can be variable. The decoder permits 3-step pipelined processing based on the modified Euclid's algorithm(MEA). A new architecture for the MEA is designed for variable values of error correcting capability t. To maintain the throughput rate with less circuitry, the MEA block uses both the recursive and the overclocking technique. The decoder can decode a codeword received not only in a burst mode, but also in a continuous mode. It can be used in a wide range of applications due to its versatility. A versatile RS decoder over GF(2$^{8}$ ) having the error-correcting capability of up to 10 has been designed in VHDL, and successfully synthesized in an FPGA chip.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2010.11a
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• pp.96-99
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• 2010

H.264/AVC 부호화 표준은 영상의 특성을 반영하기 위해 $16{\times}16$부터 $4{\times}4$ 크기의 가변적인 블록을 이용하여 부호화 효율을 높인다. 하지만 이로 인해 부호기의 복잡도가 증가된다. 부호기 복잡도를 증가시키는 여러 요인 중, H.264/AVC의 모드 결정은 부호기의 복잡도를 증가시키는 주요인이다. 본 논문에서는 IPPP구조에서 비트율 왜곡값을 이용하여 고속으로 매크로블록의 모드를 결정하는 방법을 제안한다. 인트라 화면에서의 인트라 $4{\times}4$, 인트라 $16{\times}16$의 비트율 왜곡 평균값으로 영상에 적응적인 최대 임계값과 최소 임계값을 결정한다. 다음, $16{\times}16$, $16{\times}8$, $8{\times}16$ 인터 모드의 비트율 왜곡값이 최대 임계값과 최소 임계값으로 분할한 범위 중 어느 곳에 해당하는지를 살펴보고, 이에 따라 인트라 모드 결정 단계를 선택적으로 결정한다. 제안하는 알고리즘은 기존의 H.264/AVC에 비해 부호화 효율의 큰 감소 없이 평균 27.42%의 부호화 시간을 감소시켰다.

• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.191-194
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• 2002

최근 음성 부호화기의 연구방향은 저전송률, 저복잡도와 더불어 가변전송률 음성부호화기에 대한 연구로 진행되고 있다. 지금까지 제안된 저전송률 음성부호화기로는 스펙트럼 모델링을 이용한 MBE 계열과 혼성부호화 방식의 CELP 계열이 있다. 그 중에서 가장 많은 연구가 이루어지고 있는 방식이 CELP 방식이다. 이 방식은 4.8kbps 내외의 전송율에서 양호한 음질을 얻을 수 있다. 본 논문에서는 평균자승오차값을 최소화하여 계산량을 줄이고 음질을 향상시킬 수 있는 새로운 알고리즘을 제안한다. 먼저 G.723.1 부호화기에서 인지가중필터를 거친 신호를 LSP를 이용하여 각 포만트의 위치를 검출하여 Pole점만 비교하여 Zero점의 영향을 최소화 하였고 평균자승오차값을 최소화 하여 문턱값에 가장 가까운 값을 대표 피치이득계수로 정하고 그때의 피치와 함께 부호화한다.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.397-409
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• 2003

This paper describes an implementation of radix-4 trellis parallel architecture and backward state transition control trace back Viterbi decoder, and presents the application results to high speed wireless LAN. The radix-4 parallelized architecture Vietrbi decoder can not only improve the throughput with simple structure, but also have small processing delay time and overhead circuit compared to M-step trellis architecture one. Based on these features, this paper addresses a novel Viterbi decoder which is composed of branch metric computation, architecture of ACS and trace back decoding by sequential control of backward state transition for the implementation of radix-4 trellis parallelized structure. With the proposed architecture, the decoding of variable code rate due to puncturing the base code can easily be implemented by the unified Viterbi decoder. Moreover, any additional circuit and/or peripheral control logic are not required in the proposed decoder architecture. The trace back decoding scheme with backward state transition control can carry out the sequential decoding according to ACS cycle clock without additional circuit for survivor memory control. In order to evaluate the usefulness, the proposed method is applied to channel CODEC of the IEEE 802.11a high speed wireless LAN, and HDL coding simulation results are presented.

• The Journal of the Acoustical Society of Korea
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• v.15 no.2
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• pp.95-100
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• 1996

In this paper, we present an image coder using variable quantizer for newly proposed JPEG extensions which has been standardized as ISO/IEC 10918-3(ITU-T Rec. T.84). It is necessary to alleviate the blocking artifact which is more sensitive to human eye in view of the spatial frequency sensitivity. The blocking artifact arises in the lower activity area rather than in the higher area. Therefore variable quantizer use the horizontal and vertical derivatives for calculating the $8{\times}8$ block activity. We classified nonlinear quantizer parameter into 5 categories in order to finely quantize in the lower active region. As a result of simulation for various images, the proposed coder increases subjective and objective quality at a given bit rate.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.1-11
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• 1999

In this paper, we proposed a design method of parameterized viterbi decoder, which automatically synthsizes the diverse viterbi deciders used in the digital mobile communication systems. It is designed to synthesize a viterbi decoder specified by user-provided parameters. Those parameters are constraint length, code rate generator polynomials of teh convolutional encoder, data rate and bits/frame of the data transmission, and soft decision bits of viterbi decoder. For the design of the parameterized viterbi decoder, we designed a user interface module C-language, and a viterbi decoder module in a hierarchical atructure using VHDL language and its generic statement. For the verification of the parameterized viterbi decoder, we compared our synthesized viterbi decoder with the conventional viterbi decoder which is designed for the IS-95 CDMA system. The proposed design method of the viterbi decoder will be a new method to obtain a required viterbi decoder in a very short time only by supplying the design parameters.

• Journal of Broadcast Engineering
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• v.6 no.2
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• pp.148-159
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• 2001

This paper presents a selective duality control system to control relative picture quality among the video programs in terms of Peak Signal-to-Noise Ratio (PSNR) . The selective quality control system allows variable bit rate (VBR) for each video program to maintain the pre-determitted relative picture Quality among aggregated video programs while keeping a constant bit rate for alt programs to be transmitted over a single constant bit rate (CBR) channel. Thus is achieved by simultaneous controlling the video encoders to generate VBR video streams at the central controller. furthermore, we also suggest a buffer regulation method based on the analysis of the constraints Imposed by sender/receiver buffer sizes and the total transmission rate. Through various simulation results, it is found that the proposed quality control system guarantees that the video buffers neither overflow nor underflow and the quality control errors do not exceed 0.1 dB.