• Korean Journal of Materials Research
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• v.9 no.12
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• pp.1245-1251
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• 1999

Phase-change optical disk very rapid recording, high densification of data, resulting in high feedback rate and good C/N(carrier to noise) ratio of a feedback signal. However, repetitive thermal energy may cause the deformation of a disk or the lowering of an eliminability and a cyclability of the recording. The lowering of the cyclability can be reduced by insertion of thin layer of ZnS-$SiO_2$ dielectric thin film in appropriate disk structure between the upper and lower part of the recording film. Using the Taguchi method, optimum conditions satisfying both the optimized quality characteristic values and the scattering values for film formation were found to be the target R.F. power of 200W, the substrate R.F. power of 20W, the Ar pressure of 6mTorr, and the electrode distance of 6cm. From the refractive index data, the existence of the strong interaction between the electrode distance and Ar pressure was confirmed, and so was the large effect of the electrode distance on transmittance. According to the analysis of TEM and XRD, the closer the electrode distance was, the finer was the grain size due to the high deposition rate. However, the closer electrode distance brought the negative effect on the morphology of the film and caused the reduction of transmittance. AFM and SEM analyses showed that the closer the electrode distance was, the worse was the morphology due to the high rate of the deposition. Under optimum condition, the deposited thin film showed a good morphology and dense microstructure with less defects.

• Journal of Sensor Science and Technology
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• v.8 no.2
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• pp.115-123
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• 1999

A micro-gas sensor with heater and sensing electrode on the same plane was fabricated on phosphosilicate glass(PSG, 800nm)/$Si_3N_4$ (150nm) dielectric membrane. PSG film was provided by atmospheric pressure chemical vapor deposition(APCVD), and $Si_3N_4$ film by low pressure chemical vapor deposition (LPCVD). Total area of the fabricated device was $3.78{\times}3.78mm^2$. The area of diaphragm was $1.5{\times}1.5mm^2$, and that of the sensing layer was $0.24{\times}0.24mm^2$. Finite-element simulation was employed to estimate temperature distribution for a square-shaped diaphragm. The power consumption of Pt heater was about 85mW at $350^{\circ}C$. Tin thin films were deposited on the silicon substrate by thermal evaporation at room temperature and $232^{\circ}C$, and tin oxide films($SnO_2$) were prepared by thermal oxidation of the metallic tin films at $650^{\circ}C$ for 3 hours in oxygen ambient. The film analyses were carried out by SEM and XRD techniques. Effects of humidity and ambient temperature on the resistance of the sensing layer were found to be negligible. The fabricated micro-gas sensor exhibited high sensitivity to butane gas.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.200-200
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• 2010

In recent times, metal oxide semiconductors thin films transistor (TFT), such as zinc and indium based oxide TFTs, have attracted considerable attention because of their several advantageous electrical and optical properties. There are many deposition methods for fabrication of ZnO-based materials such as chemical vapor deposition, RF/DC sputtering and pulsed laser deposition. However, these vacuum process require expensive equipment and result in high manufacturing costs. Also, the methods is difficult to fabricate various multicomponent oxide semiconductor. Recently, several groups report solution processed metal oxide TFTs for low cost and non vacuum process. In this study, we have newly developed solution-processed TFTs based on Ti-related multi-component transparent oxide, i. e., InTiO as the active layer. We propose new multicomponent oxide, Titanium indium oxide(TiInO), to fabricate the high performance TFT through the sol-gel method. We investigated the influence of relative compositions of Ti on the electrical properties. Indium nitrate hydrate [$In(NO^3).xH_2O$] and Titanium isobutoxide [$C_{16}H_{36}O_4Ti$] were dissolved in acetylacetone. Then monoethanolamine (MEA) and acetic acid ($CH_3COOH$) were added to the solution. The molar concentration of indium was kept as 0.1 mol concentration and the amount of Ti was varied according to weighting percent (0, 5, 10%). The complex solutions become clear and homogeneous after stirring for 24 hours. Heavily boron (p+) doped Si wafer with 100nm thermally grown $SiO_2$ serve as the gate and gate dielectric of the TFT, respectively. TiInO thin films were deposited using the sol-gel solution by the spin-coating method. After coating, the films annealed in a tube furnace at $500^{\circ}C$ for 1hour under oxygen ambient. The 5% Ti-doped InO TFT had a field-effect mobility $1.15cm^2/V{\cdot}S$, a threshold voltage of 4.73 V, an on/off current ratio grater than $10^7$, and a subthreshold slop of 0.49 V/dec. The 10% Ti-doped InO TFT had a field-effect mobility $1.03\;cm^2/V{\cdot}S$, a threshold voltage of 1.87 V, an on/off current ration grater than $10^7$, and a subthreshold slop of 0.67 V/dec.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.3
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• pp.47-52
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• 2008

This investigation was performed in order to study the properties of deposition and layers by Silicon Dioxide, SiO2, as dielectric onto Via and Trench which have high Aspect Ratio (AR). Thus, in order to confirm these properties, three types of CVD, which were PECVD, PETEOS, and ALD, were selected. On the experiment each of the property sections was estimated that step overage of PECVD: <30%, PETEOS: 45%, ALD: 75% and the RSM of PECVD: 27.8 nm, PETEOS: 2.1 nm, ALD: <2.0 nm. As a result of this experiment for the property of electric film, ALD was valuated to be the most favorable outcome. However, ALD was valuated to have the least quality for the deposition rate. ALD deposition rate, $10\;\AA/min$ by $1\;\AA$/1cycle, was prominently lower than PETEOS, which had the deposition rate of $5000\;\AA$/min. Since electric film requires at least $1000\;\AA$ thicknesses, ALD was not suitable for the deposition rate. which is the most important component in a practical use. Therefore, in this particular study, PETEOS was evaluated to be the most suitable recipe.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.12 s.354
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• pp.83-88
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• 2006

In this paper, we propose a new cross bar embedded structure for improvement of attenuation characteristics along the different lossy media. A general characterization procedure based on the extraction of the characteristic impedance and propagation constant for analyzing a single MIS(Metal-Insulator-Semiconductor) transmission line used and an analysis for a new substrate shielding MIS structure consisting of grounded crossbars at the interface between Si and Sio2 layer using the Finite-Difference Time-Domain(FDTD) technique is used. In order to reduce the substrate effects on the transmission line characteristics, a shielding structure consisting of grounded cross bar lines over time-domain signal has been examined. The extracted, distributed frequency-dependent transmission line parameters as well as the line voltages and currents, and also corresponding equivalent circuit parameters have been examined as function of frequency. It is shown that the quality factor of the transmission line can be improved without significant changes in the characteristic impedance and effective dielectric constant.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.170-170
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• 2010

Thin-film transistors (TFT) have become the key components of electronic and optoelectronic devices. Most conventional thin-film field-effect transistors in display applications use an amorphous or polycrystal Si:H layer as the channel. This silicon layers are opaque in the visible range and severely restrict the amount of light detected by the observer due to its bandgap energy smaller than the visible light. Therefore, Si:H TFT devices reduce the efficiency of light transmittance and brightness. One method to increase the efficiency is to use the transparent oxides for the channel, electrode, and gate insulator. The development of transparent oxides for the components of thin-film field-effect transistors and the room-temperature fabrication with low voltage operations of the devices can offer the flexibility in designing the devices and contribute to the progress of next generation display technologies based on transparent displays and flexible displays. In this thesis, I report on the dc performance of transparent thin-film transistors using amorphous indium tin zinc oxides for an active layer. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium tin zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium tin zinc oxides was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 4.17V and an on/off ration of ${\sim}10^9$ operated as an n-type enhancement mode with saturation mobility with $15.8\;cm^2/Vs$. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium tin zinc oxides for an active layer were reported. The devices were fabricated at room temperature by RF magnetron sputtering. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.287-287
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• 2010

We report a new direct patterning method, called liquid bridge-mediated nanotransfer molding (LB-nTM), for the formation of two- or three-dimensional structures with feature sizes between tens of nanometers and tens of micron over large areas. LB-nTM is based on the direct transfer of various materials from a mold to a substrate via a liquid bridge between them. This procedure can be adopted for automated direct printing machines that generate patterns of functional materials with a wide range of feature sizes on diverse substrates. Arrays of TIPS-PEN TFTs were fabricated on 4" polyethersulfone (PES) substrates by LB-nTM using PDMS molds. An inverted staggered structure was employed in the TFT device fabrication. A 150 nm-thick indium-tin oxide (ITO) gate electrode and a 200 nm-thick SiO2dielectric layer were formed on a PES substrate by sputter deposition. An array of TIPS-PEN patterns (thickness: 60 nm) as active channel layers was fabricated on the substrate by LB-nTM. The nominal channel length of the TIPS-PEN TFT was 10 mm, while the channel width was 135 mm. Finally, the source and drain electrodes of 200 nm-thick Ag were defined on the substrate by LB-nTM. The TIPS-PEN TFTs can endure strenuous bending and are also transparent in the visible range, and therefore potentially useful for flexible and invisible electronics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.7
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• pp.713-717
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• 2004

In this study, the etched trench properties including cross-sectional profile, surface roughness, and crystalline defects were investigated depending on the various silicon etching and additive gases, For the case of HBr$He-O_2SiF_4$ trench etching gas mixtures, the excellent trench profile and minimum defects in the silicon trench were achieved. Due to the residual oxide film grown by the additive oxygen gas, which acts as a protective layer during trench etching, the undercut and defects generation in the trench were suppressed. To improve the electrical characteristics of trench gate, the hydrogen annealing process after trench etching was also adopted. Through the hydrogen annealing, the trench corners might be rounded by the silicon atomic migration at the trench corners having high potential. The rounded trench corner can afford to reduce the gate electric field and grow a uniform gate oxide. As a result, dielectric strength and TDDB characteristics of the hydrogen annealed trench gate oxide were remarkably increased compared to the non-hydrogen annealed one.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.142.2-142.2
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• 2015

Plasma etch endpoint detection (EPD) of SiO2 and PR layer is demonstrated by plasma impedance monitoring in this work. Plasma etching process is the core process for making fine pattern devices in semiconductor fabrication, and the etching endpoint detection is one of the essential FDC (Fault Detection and Classification) for yield management and mass production. In general, Optical emission spectrocopy (OES) has been used to detect endpoint because OES can be a simple, non-invasive and real-time plasma monitoring tool. In OES, the trend of a few sensitive wavelengths is traced. However, in case of small-open area etch endpoint detection (ex. contact etch), it is at the boundary of the detection limit because of weak signal intensities of reaction reactants and products. Furthemore, the various materials covering the wafer such as photoresist (PR), dielectric materials, and metals make the analysis of OES signals complicated. In this study, full spectra of optical emission signals were collected and the data were analyzed by a data-mining approach, modified K-means cluster analysis. The K-means cluster analysis is modified suitably to analyze a thousand of wavelength variables from OES. This technique can improve the sensitivity of EPD for small area oxide layer etching processes: about 1.0 % oxide area. This technique is expected to be applied to various plasma monitoring applications including fault detections as well as EPD.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.31-32
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• 2010

In our previous reports [1-3], electron transport for the switching and memory devices using alkyl thiol-tethered Ru-terpyridine complex compounds with metal-insulator-metal crossbar structure has been presented. On the other hand, among organic memory devices, a memory based on the OFET is attractive because of its nondestructive readout and single transistor applications. Several attempts at nonvolatile organic memories involve electrets, which are chargeable dielectrics. However, these devices still do not sufficiently satisfy the criteria demanded in order to compete with other types of memory devices, and the electrets are generally limited to polymer materials. Until now, there is no report on nonvolatile organic electrets using nano-interfaced organic monomer layer as a dielectric material even though the use of organic monomer materials become important for the development of molecularly interfaced memory and logic elements. Furthermore, to increase a retention time for the nonvolatile organic memory device as well as to understand an intrinsic memory property, a molecular design of the organic materials is also getting important issue. In this presentation, we report on the OFET memory device built on a silicon wafer and based on films of pentacene and a SiO2 gate insulator that are separated by organic molecules which act as a gate dielectric. We proposed push-pull organic molecules (PPOM) containing triarylamine asan electron donating group (EDG), thiophene as a spacer, and malononitrile as an electron withdrawing group (EWG). The PPOM were designed to control charge transport by differences of the dihedral angles induced by a steric hindrance effect of side chainswithin the molecules. Therefore, we expect that these PPOM with potential energy barrier can save the charges which are transported to the nano-interface between the semiconductor and organic molecules used as the dielectrics. Finally, we also expect that the charges can be contributed to the memory capacity of the memory OFET device.[4]