• Title/Summary/Keyword: $O_2$ plasma etching

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Reactive Ion Etching with High Density Plasma for Two-Step Texturing

  • Yeo, In-Hwan;Park, Ju-Eok;Kim, Jun-Hui;Jo, Hae-Seong;Im, Dong-Geon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.701-701
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    • 2013
  • 표면조직화는 입사되는 빛의 반사를 줄이고 태양전지 내부에서 빛의 이동거리를 길게하여 효율을 향상시키는 중요한 요소가 된다. 결정질 실리콘 표면 조직화에서 일반적으로 알카리 습식 식각이 많이 사용되며 이 식각 방법으로 반사도를 400~1000 nm의 파장에서 평균 11%까지 줄일 수 있다. 본 논문에서는 빛의 반사를 더 줄여 단락전류를 향상 시키기 위해 기존 NaOH를 이용한 표면 조직화를 수행한 후에 반응성 이온 식각 공정을 적용하는 2단계 표면 조직화 공정을 최적화 하였다. 먼저 NaOH 2%, IPA 7.5%용액에서 $80^{\circ}C$ 유지하면서 35분간 식각을 한 후에 ICP 장치에서 SF6/O2 비율 1:1, 공정 압력 25 mTorr, 시간 200 s로 고정하고 RF 파워를 25~200 W로 변화를 주면서 실험 하였다. 그 결과 마이크로 크기의 피라미드 위에 나노 크기의 피라미드를 형성할 수 있었으며 400~1,000 nm 파장에서 평균 4.96%까지 반사도를 낮출 수 있었다. 기존 알카리 식각 공정에 비해 반사도가 많이 낮아지게 되어 입사되는 빛의 양이 증가함으로서 단락전류가 증가하고 효율이 향상될 것으로 기대된다.

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Endpoint Detection in Semiconductor Etch Process Using OPM Sensor

  • Arshad, Zeeshan;Choi, Somang;Jang, Boen;Hong, Sang Jeen
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.237.1-237.1
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    • 2014
  • Etching is one of the most important steps in semiconductor manufacturing. In etch process control a critical task is to stop the etch process when the layer to be etched has been removed. If the etch process is allowed to continue beyond this time, the material gets over-etched and the lower layer is partially removed. On the other hand if the etch process is stopped too early, part of the layer to be etched still remains, called under-etched. Endpoint detection (EPD) is used to detect the most accurate time to stop the etch process in order to avoid over or under etch. The goal of this research is to develop a hardware and software system for EPD. The hardware consists of an Optical Plasma Monitor (OPM) sensor which is used to continuously monitor the plasma optical emission intensity during the etch process. The OPM software was developed to acquire and analyze the data to perform EPD. Our EPD algorithm is based on the following theory. As the etch process starts the plasma generated in the vacuum is added with the by-products from the etch reactions on the layer being etched. As the endpoint reaches and the layer gets completely removed the plasma constituents change gradually changing the optical intensity of the plasma. Although the change in optical intensity is not apparent, the difference in the plasma constituents when the endpoint has reached leaves a unique signature in the data gathered. Though not detectable in time domain, this signature could be obscured in the frequency spectrum of the data. By filtering and analysis of the changes in the frequency spectrum before and after the endpoint we could extract this signature. In order to do that, first, the EPD algorithm converts the time series signal into frequency domain. Next the noise in the frequency spectrum is removed to look for the useful frequency constituents of the data. Once these useful frequencies have been selected, they are monitored continuously in time and using a sub-algorithm the endpoint is detected when significant changes are observed in those signals. The experiment consisted of three kinds of etch processes; ashing, SiO2 on Si etch and metal on Si etch to develop and evaluate the EPD system.

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Profile control of high aspect ratio silicon trench etch using SF6/O2/BHr plasma chemistry (고종횡비 실리콘 트랜치 건식식각 공정에 관한 연구)

  • 함동은;신수범;안진호
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.69-69
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    • 2003
  • 최근 trench capacitor, isolation trench, micro-electromechanical system(MEMS), micro-opto-electromechanical system(MOEMS)등의 다양한 기술에 적용될 고종횡비(HAR) 실리콘 식각기술연구가 진행되어 지고 있다. 이는 기존의 습식식각시 발생하는 결정방향에 따른 식각률의 차이에 관한 문제와 standard reactive ion etching(RIE) 에서의 낮은 종횡비와 식각률에 기인한 문제점들을 개선하기 위해 고밀도 플라즈마를 이용한 건식식각 장비를 사용하여 고종횡비(depth/width), 높은 식각률을 가지는 이방성 트랜치 구조를 얻는 것이다. 초기에는 주로 HBr chemistry를 이용한 연구가 진행되었는데 이는 식각률이 낮고 많은양의 식각부산물이 챔버와 시편에 재증착되는 문제가 발생하였다. 또한 SF6 chemistry의 사용을 통해 식각률의 향상은 가져왔지만 화학적 식각에 기인한 local bowing과 같은 이방성 식각의 문제점들로 인해 최근까지 CHF3, C2F6, C4F8, CF4등의 첨가가스를 이용하여 측벽에 Polymer layer의 식각보호막을 형성시켜 이방성 구조를 얻는 multi_step 공정이 일반화 되었다. 이에 본 연구에서는 SF6 chemistry와 소량의 02/HBr의 첨가가스를 이용한 single_step 공정을 통해 공정의 간소화 및 식각 프로파일을 개선하여 최적의 HAR 실리콘 식각공정 조건을 확보하고자 하였다.

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UV-nanoimprint Patterning Without Residual Layers Using UV-blocking Metal Layer (UV 차단 금속막을 이용한 잔류층이 없는 UV 나노 임프린트 패턴 형성)

  • Moon Kanghun;Shin Subum;Park In-Sung;Lee Heon;Cha Han Sun;Ahn Jinho
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.4 s.37
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    • pp.275-280
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    • 2005
  • We propose a new approach to greatly simplify the fabrication of conventional nanoimprint lithography (NIL) by combined nanoimprint and photolithography (CNP). We introduce a hybrid mask mold (HMM) made from UV transparent material with a UV-blocking Cr metal layer placed on top of the mold protrusions. We used a negative tone photo resist (PR) with higher selectivity to substrate the CNP process instead of the UV curable monomer and thermal plastic polymer that has been commonly used in NIL. Self-assembled monolayer (SAM) on HMM plays a reliable role for pattern transfer when the HMM is separated from the transfer layer. Hydrophilic $SiO_2$ thin film was deposited on all parts of the HMM, which improved the formation of SAM. This $SiO_2$ film made a sub-10nm formation without any pattern damage. In the CNP technique with HMM, the 'residual layer' of the PR was chemically removed by the conventional developing process. Thus, it was possible to simplify the process by eliminating the dry etching process, which was essential in the conventional NIL method.

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4.1” Transparent QCIF AMOLED Display Driven by High Mobility Bottom Gate a-IGZO Thin-film Transistors

  • Jeong, J.K.;Kim, M.;Jeong, J.H.;Lee, H.J.;Ahn, T.K.;Shin, H.S.;Kang, K.Y.;Park, J.S.;Yang, H,;Chung, H.J.;Mo, Y.G.;Kim, H.D.;Seo, H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.145-148
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    • 2007
  • The authors report on the fabrication of thin film transistors (TFTs) that use amorphous indium-gallium-zinc oxide (a-IGZO) channel and have the channel length (L) and width (W) patterned by dry etching. To prevent the plasma damage of active channel, a 100-nm-thckness $SiO_{x}$ by PECVD was adopted as an etch-stopper structure. IGZO TFT (W/L=10/50${\mu}m$) fabricated on glass exhibited the high performance mobility of $35.8\;cm^2/Vs$, a subthreshold gate voltage swing of $0.59V/dec$, and $I_{on/off}$ of $4.9{\times}10^6$. In addition, 4.1” transparent QCIF active-matrix organic light-emitting diode display were successfully fabricated, which was driven by a-IGZO TFTs.

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CoFeB과 IrMn 자성 박막의 고밀도 반응성 이온 식각

  • Kim, Eun-Ho;So, U-Bin;Gong, Seon-Mi;Jeong, Yong-U;Jeong, Ji-Won
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.232-232
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    • 2010
  • 정보화 산업의 발달은 DRAM, flash memory 등을 포함한 기존의 반도체 메모리 소자를 대체할 수 있는 차세대 메모리 소자에 대한 개발을 요구하고 있다. 특히 magnetic random access memory (MRAM)는 SRAM과 대등한 고속화 그리고 DRAM 보다 높은 기록 밀도가 가능하고 낮은 동작 전압과 소비전력 때문에 대표적인 차세대 비휘발성 메모리로 주목받고 있다. 또한 MRAM소자의 고집적화를 위해서 우수한 프로파일을 갖고 재증착이 없는 나노미터 크기의 magnetic tunnel junction (MTJ) stack의 건식 식각에 대한 연구가 선행되어야 한다. 본 연구에서는 고밀도 반응성 이온 식각법(Inductively coupled plasma reactive ion etching; ICPRIE)을 이용하여 재증착이 없이 우수한 식각 profile을 갖는 CoFeB과 IrMn 박막을 형성하고자 하였다. Photoresist(PR) 및 Ti 박막의 두 가지 마스크를 이용하여 HBr/Ar, HBr/$O_2$/Ar 식각 가스들의 농도를 변화시키면서 CoFeB과 IrMn 박막의 식각 특성들이 조사되었다. 자성 박막과 동일한 조건에 대하여 hard mask로서 Ti가 식각되었다. 좋은 조건을 얻기 위해 HBr/Ar 식각 가스를 이용 식각할 때 pressure, bias voltage, rf power를 변화시켰고 식각조건에서 Ti 하드마스크에 대한 자성 박막들의 selectivity를 조사하고 식각 profile을 관찰하였다. 식각 속도를 구하기 위해 alpha step(Tencor P-1)이 사용되었고 또한 field emission scanning electron microscopy(FESEM)를 이용하여 식각 profile을 관찰함으로써 최적의 식각 가스와 식각 조건을 찾고자 하였다.

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Fabrication and characterization of silicon field emitter array with double gate dielectric (이중 게이트 절연막을 가지는 실리콘 전계방출 어레이 제작 및 특성)

  • 이진호;강성원;송윤호;박종문;조경의;이상윤;유형준
    • Journal of the Korean Vacuum Society
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    • v.6 no.2
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    • pp.103-108
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    • 1997
  • Silicon field emitter arrays (FEAs) have been fabricated by a novel method employing a two-step tip etch and a spin-on-glass (SOG) etch-back process using double layered thermal/tetraethylortho-silicate (TEOS) oxides as a gate dielectric. A partial etching was performed by coating a low viscous photo resist and $O_2$ plasma ashing on order to form the double layered gate dielectric. A small gate aperture with low gate leakage current was obtained by the novel process. The hight and the end radius of the fabricated emitter was about 1.1 $\mu\textrm{m}$ and less than 100$\AA$, respectively. The anode emission current from a 256 tips array was turned-on at a gate voltage of 40 V. Also, the gate current was less than 0.1% of the anode current.

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A study on the oxide etching using multi-dipole type magnetically enhanced inductively coupled plasmas (자장강화된 유도결합형 플라즈마를 이용한 산화막 식각에 대한 연구)

  • 안경준;김현수;우형철;유지범;염근영
    • Journal of the Korean Vacuum Society
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    • v.7 no.4
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    • pp.403-409
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    • 1998
  • In this study, the effects of multi-dipole type of magnets on the characteristics of the inductively coupled plasmas and $SiO_2$ etch properties were investigated. As the magnets, 4 pairs of permanent magnets were used and, to etch $SiO_2, C_2F_6, CHF_3, C_4F_8, H_2$, and their combinations were used. The characteristics of the magnetized inductively coupled plasmas were investigated using a Langmuir probe and an optical emission spectrometer, and $SiO_2$ etch rates and the etch selectivity over photoresist were measured using a stylus profilometer. The use of multi-dipole magnets increased the uniformity of the ion density over the substrate location even though no significant increase of ion density was observed with the magnets. The use of the magnets also increased the electron temperature and radical densities while reducing the plasma potential. When $SiO_2$ was etched using the fluorocarbon gases, the significant increase of $SiO_2$ etch rates and also the increase of etch uniformity over the substrate were obtained using the magnets. In case of gas combinations with hydrogen, $C_4F_8/H_2$ showed the highest etch rates and etch selectivities over photoresist among the gas combinations with hydrogen used in the experiment. By optimizing process parameters at 1000 Watts of inductive power with the magnets, the highest $SiO_2$ etch rate of 8000 $\AA$/min could be obtained for 50% $C_4F_8/50% H_2$.

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Decomposition Characteristics of PFCs for Various Plasma Discharge Methods in Dielectric Barrier Discharge (DBD 반응기에서 플라즈마 방전형태에 따른 PFCs 가스의 분해 특성)

  • Kim, Kwan-Tae;Kim, Yong-Ho;Cha, Min-Suk;Song, Young-Hoon;Kim, Seock-Joon;Ryu, Jeong-In
    • Journal of Korean Society for Atmospheric Environment
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    • v.20 no.5
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    • pp.625-632
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    • 2004
  • Perfluorocompounds ($PFC_s$), such as tetrafluoromethane ($CF_4$) and hexafluoroethane ($C_2F_6$), have been widely used as plasma etching and chemical vapor deposition (CVD) gases for semiconductor manufacturing processes. Since these $PFC_s$ are known to cause a greenhouse effect intensively, there has been a growing interest in reducing $PFC_s$ emissions. Among various $CF_4$ decomposing techniques, a dielectric barrier discharge (DBD) is considered as one of a promising candidate because it has been successfully used for generating ozone ($O_3$) and decomposing nitrogen oxide (NO). Firstly, optimal concentration of oxygen for $CF_4$ decomposition was found to figure out how many primary and secondary reactions are associated with DBD process. Secondary, to find effective discharge method for $CF_4$ decomposition, a streamer and a glow mode in DBD are experimentally compared, which includes (i) coaxialcylinder DBD, (ii) DBD reactor packed with glass beads. and (iii) a glow mode operation with a helium gas. The test results showed that optimal concentration of oxygen was ranged 500 ppm~1% for treating 500 ppm of $CF_4$ and helium glow discharge was the most efficient one to decompose $CF_4$.

Characteristics of Memory Windows of MFMIS Gate Structures (MFMIS 게이트 구조에서의 메모리 윈도우 특성)

  • Park, Jun-Woong;Kim, Ik-Soo;Shim, Sun-Il;Youm, Min-Soo;Kim, Yong-Tae;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.319-322
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    • 2003
  • To match the charge induced by the insulators $CeO_2$ with the remanent polarization of ferro electric SBT thin films, areas of Pt/SBT/Pt (MFM) and those of $Pt/CeO_2/Si$ (MIS) capacitors were ind ependently designed. The area $S_M$ of MIS capacitors to the area $S_F$ of MFM capacitors were varied from 1 to 10, 15, and 20. Top electrode Pt and SBT layers were etched with for various area ratios of $S_M\;/\;S_F$. Bottom electrode Pt and $CeO_2$ layers were respectively deposited by do and rf sputtering in-situ process. SBT thin film were prepared by the metal orgnic decomposition (MOD) technique. $Pt(100nm)/SBT(350nm)/Pt(300nm)/CeO_2(40nm)/p-Si$ (MFMIS) gate structures have been fabricated with the various $S_M\;/\;S_F$ ratios using inductively coupled plasma reactive ion etching (ICP-RIE). The leakage current density of MFMIS gate structures were improved to $6.32{\times}10^{-7}\;A/cm^2$ at the applied gate voltage of 10 V. It is shown that in the memory window increase with the area ratio $S_M\;/\;S_F$ of the MFMIS structures and a larger memory window of 3 V can be obtained for a voltage sweep of ${\pm}9\;V$ for MFMIS structures with an area ratio $S_M\;/\;S_F\;=\;6$ than that of 0.9 V of MFS at the same applied voltage. The maximum memory windows of MFMIS structures were 2.28 V, 3.35 V, and 3.7 V with the are a ratios 1, 2, and 6 at the applied gate voltage of 11 V, respectively. It is concluded that ferroelectric gate capacitors of MFMIS are good candidates for nondestructive readout-nonvolatile memories.

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