• Proceedings of the Optical Society of Korea Conference
• /
• 2000.08a
• /
• pp.182-183
• /
• 2000

유전체 층으로 SiO$_2$와 Ta$_2$O$_{5}$ , 자성층으로 Bi:YIG를 가지는 구조 (SiO$_2$/Ta$_2$O$_{5}$ )$_{5}$ /Bi:YIG/(Ta$_2$O$_{5}$ /SiO$_2$)$_{5}$ 의 1차원 자성 포토닉 결정의 광학적 및 자기광학적 특성을 수치해석을 통하여 계산하고$^{(2)}$ , 이를 바탕으로 1차원 자성 포토닉 결정을 RF magnetron sputtering과 rapid thermal annealing 방법을 이용하여 제작하였다.$^{(1)}$ 제조된 자성 포토닉 결정은 선명한 포토닉 밴드갭을 보였고, 원하는 파장에서 큰 페러데이 회전각과 투과율이 얻어졌다. (중략)

• Journal of the Semiconductor & Display Technology
• /
• v.22 no.1
• /
• pp.83-87
• /
• 2023

Y₂SiO₅ Powder based on silicon and yttrium is well known as powder phosphors due to their excellent sustainability and efficiency. A new electroluminescence device was fabricated with Y₂SiO₅:Eu³⁺ powder phosphors though a simple screen printing method. The powder-dispersed electroluminescence device consisted of the Y₂SiO₅:Eu³⁺ powder-dispersed phosphor layer and BaTiO₃-dispersed dielectric layer. The annealing temperature of the phosphor for the best powder electroluminescence performance was optimized to high temperature in ambient atmosphere though a solid-state reaction. The Eu³⁺ concentration for the best device performance was also investigated and furthermore, the thermal dependence of the electroluminescence intensity was investigated at the operating voltage at 100℃, which is the Curie temperature of the BaTiO₃ layer. And the intensity was exponentially increased with voltage and increased linearly with frequency.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.5
• /
• pp.8-14
• /
• 2007

In this paper, $HfO_2$/Hf stacked film has been applied as the gate dielectric in MOS devices. The $HfO_2$ thin film was deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAHf and $O_3$ as precursors. Prior to the deposition of the $HfO_2$ film, a thin Hf metal layer was deposited as an intermediate layer. Round-type MOS capacitors have been fabricated on Si substrates with 2000${\AA}$-thick Al or Pt top electrode. The prepared film showed the stoichiometric components. At the $HfO_2$/Si interface, both Hf-Si and Hf-Si-O bonds were observed, instead of Si-O bond. The sandwiched Hf metal layer suppressed the growing of $SiO_x$ layer so that $HfSi_xO_y$ layer was achieved. It seems that the intermediate Hf metal layer has a benefit for the enhancement of electric characteristics of gate dielectric in $HfO_2$/Si structure.

• The Bulletin of The Korean Astronomical Society
• /
• v.40 no.2
• /
• pp.40.3-41
• /
• 2015

We performed simultaneous observations of H2O and SiO masers toward VX Sgr using the Korean VLBI Network (KVN) and Source Frequency Phase Referencing (SFPR) method. The observations were carried out at 5 epochs from 2014 February to 2015 June. The relative locations of the SiO with respect to the H2O maser emission were determined at two epochs by SFPR for the first time. The H2O masers show well developed asymmetric outflow features which are spread up to ~300 mas in diameter. On the other hand, the SiO masers show a ring-like structure close to the central star with ~ 30 mas diameter. The SFPR observational results at two epochs (${\varphi}=0.83$ and 0.99) provide similar relative locations of H2O and SiO maser features. These superposed maps of H2O and SiO masers lead us to investigate the development of outflow motions from relatively spherical SiO maser regions close to central star to aspherical H2O maser regions according to optical phase of stellar pulsation together with the prediction of the position of central star.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.51 no.5
• /
• pp.185-190
• /
• 2002

Capacitor material utilized in the downsizing passive devices and dynamic random access memory(DRAM) requires the physical and electrical properties at given area such as capacitor thickness reduction, relative dielectric constant increase, low leakage current and thermal stability. Common capacitor materials, $SiO_2$, $Si_3N_4$, $SiO_2$/$Si_3N_4$,TaN and et al., used until recently have reached their physical limits in their application to several hundred angstrom scale capacitor. $Ta_2O_{5}$ is known to be a good alternative to the existing materials for the capacitor application because of its high dielectric constant (25 ~35), low leakage current and high breakdown strength. Despite the numerous investigations of $Ta_2O_{5}$ material, there have little been established the clear understanding of the annealing effect on capacitance characteristic and conduction mechanism, design and fabrication for $Ta_2O_{5}$ film capacitor. This study presents the structure-property relationship of reactive-sputtered $Ta_2O_{5}$ MIM capacitor structure processed by annealing in a vacuum. X-ray diffraction patterns skewed the existence of amorphous phase in as-deposited condition and the formation of preferentially oriented-$Ta_2O_{5}$ in 670, $700^{\circ}C$ annealing. On 670, $700^{\circ}C$ annealing under the vacuum, the leakage current decrease and the enhanced temperature-capacitance characteristic stability. and the leakage current behavior is stable irrespective of applied electric field. The results states that keeping $Ta_2O_{5}$ annealed at vacuum gives rise to improvement of electrical characteristics in the capacitor by reducing oxygen-vacancy and the broken bond between Ta and O.

• Journal of the Korean Ceramic Society
• /
• v.23 no.5
• /
• pp.25-34
• /
• 1986

This study was to refined the crystal structure of solid solution to determine the position and amount of Al in diopside and to relate crystal structure changes and properties of solid solution. Single crystals of the solid solution in the system CaO.MgO.$2 SiO_2-Al_2O_3$ were made from the melt with slow cooling and used to refine the structure. The following were obtained. 1. Tetrahedra rotated around axis parallel to the direction which the angle 03-03-03 became small. 2. Tetrahedron became large and regular. Average T-O bond distance increased 0.53 percent. 3. M1 octahedron became small and average M1-O bond distance decreased 1.1 percent. 4, M2 polyhedron became small and average M2-O bond distance decreased 0.37 percent Polythedron was affected not so much compared with any cation site. 5. Distance between metal ions distances between T and oxygens which were coordinated with M2 and meighboring tetrahedron distances between M2 and oxygens which coordinated with M1 and M2 were not changed almost. 6. $Al^{3+}$ substituted 4Mg^{2+}$ and $Si^{4+}$

• Journal of the Korean Applied Science and Technology
• /
• v.21 no.3
• /
• pp.231-237
• /
• 2004

Ga-MFI was synthesized by a hydrothermal process at atmospheric pressure. The effect of mole ratios of reactants on crystallization was also investigated thoroughly. The characteristics of synthesized Ga-MFI was compared with ZSM-5. The synthesis of Ga-MFI was carried out with five different mole-compositions of $\underline{a}SiO_2-\underline{b}Ga_2O_3-\underline{c}Na_2O-\underline{d}TPA_2o-\underline{e}H_2O$. The synthesized Ga-MFI and ZSM-5 were characterized by XRD and FT-IR. The inorganic cation ($Na^+$) and water played an important role in crystallinity and the organic cation ($TPA^+$) as a template played a great influence on yields. With the increase in the amount of $Ga^{3+}$, crystallization time was increased. With a fixed $SiO_2/Ga_2O_3$ ratio of 400, the optimum reaction condition was obtained at $H_2O/SiO_2$=30${\sim}$35, $Na_2O/SiO_2$=0.5${\sim}$0.6, and $TPA_2O/Na_2O$=1${\sim}$1.25. In these cases, the crystallinity and yield were more than 95% and 90%, respectively. By comparing IR spectrum of Ga-MFI with those of ZSM-5 and silicalite, it was found that Ga-MFI showed a unique peak at 970 $cm^{-1}$, which may be used to identify Ga-MFI from ZSM-5 and silicalite.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.08a
• /
• pp.255-255
• /
• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Journal of the Korean Vacuum Society
• /
• v.7 no.1
• /
• pp.35-42
• /
• 1998

- The Si-$SiO_2$ interface of silicon on insulator (SOI) formed by 100 keV $O^+$ was ohserved using high resolution transmission electron microscopy (HRTEM), before and after annealing. The interface of as-implanted sample, ~$5\times 10^{17}\textrm{cm}^{-2}O^+$ implanted at $550^{\circ}C$ was very rough and it has many defectsoxide precipitate, stacking fault, coesite $SiO_2$ etc. However, the interface became flat by high temperature annealing at $1300^{\circ}C$ for 4 hour. It's roughness, observed by HRTEM, was comparable to the interface roughness of 3 keV $O_2^\;+$ ion beam oxide and -6 nm gate oxide formed by thermal oxidation.

• Korean Journal of Materials Research
• /
• v.6 no.1
• /
• pp.57-66
• /
• 1996

MoSi2 heating elements were fabricated by sintering of MoSi2 powders which were synthesized through SHS(Self-propagating high-temperature synthesis). Their high-temperature oxidation behavior in air through SHS(Self-propagating high-temperature synthesis). Their high-temperature oxidation behavior on air at 1000-1600$^{\circ}C$ was investigated through a high-temperature X-ray diffractomer and isothermal heating in a muffle furnace. The thermal expansion of MoSi2 and SiO2 was studied by measuring their lattice parameters on heating. The linear expansion coeffcient of MoSi2 along c-axis was about 1.5 times larger than that along a-axis showing a strong thermal anisotropy. Few $\mu\textrm{m}$-thick Mo5Si3 layer was found beneath SiO2 layer suggesting that The major reaction products would be SiO2 and Mo5Si3. The Si-rich bentonite resulted in the faster growth of MoSi2 grains probably by enhancing the mass transport when they are melted during high-temperature oxidation.