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| 1 |
Application of Plating Simulation for PCB and Pakaging Process
Lee, Kyu Hwan;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.1-7,
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| 2 |
Interconnect Process Technology for High Power Delivery and Distribution
Oh, Keong-Hwan;Ma, Jun-Sung;Kim, Sungdong;Kim, Sarah Eunkyung;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.9-14,
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| 3 |
The Chip Bonding Technology on Flexible Substrate by Using Micro Lead-free Solder Bump
Kim, Min-Su;Ko, Yong-Ho;Bang, Jung-Hwan;Lee, Chang-Woo;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.15-20,
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| 4 |
Electrically Programmable Fuse - Application, Program and Reliability
Kim, Deok-Kee;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.21-30,
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| 5 |
Reliability of High Temperature and Vibration in Sn3.5Ag and Sn0.7Cu Lead-free Solders
Ko, Yong-Ho;Kim, Taek-Soo;Lee, Young-Kyu;Yoo, Sehoo;Lee, Chang-Woo;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.31-36,
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| 6 |
Ti/Cu CMP process for wafer level 3D integration
Kim, Eunsol;Lee, Minjae;Kim, Sungdong;Kim, Sarah Eunkyung;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.37-41,
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| 7 |
Error Analysis for Microwave Permittivity Measurement using Post Resonator Method
Cho, Mun-Seong;Lim, Donggun;Park, Jae-Hwan;Park, Jae-Gwan;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.43-48,
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| 8 |
Analysis on the Thermal Deformation of Flip-chip Bump Layer by the IMC's Implication
Lee, Tae Kyoung;Kim, Dong Min;Jun, Ho In;Huh, Seok-Hwan;Jeong, Myung Young;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.49-56,
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| 9 |
Numerical Analysis on the Design Variables and Thickness Deviation Effects on Warpage of Substrate for FCCSP
Cho, Seunghyun;Jung, Hunil;Bae, Onecheol;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.57-62,
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| 10 |
Adhesion Reliability Enhancement of Silicon/Epoxy/Polyimide Interfaces for Flexible Electronics
Kim, Sanwi;Kim, Taek-Soo;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.63-69,
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| 11 |
Chip Interconnection Process for Smart Fabrics Using Flip-chip Bonding of SnBi Solder
Choi, J.Y.;Park, D.H.;Oh, T.S.;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.71-76,
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| 12 |
The Study on Chip Surface Treatment for Embedded PCB
Jeon, Byung-Sub;Park, Se-Hoon;Kim, Young-Ho;Kim, Jun-Cheol;Jung, Seung-Boo;
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The Korean Microelectronics and Packaging Society
, v.19, no.3, pp.77-82,
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