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http://dx.doi.org/10.5207/JIEIE.2004.18.6.045

A Study on the PLD Circuit Design of Pattern Generator  

Roh, Young-Dong (호서대학교 전기정보통신공학부)
Kim, Joon-Seek (호서대학교 전기정보통신공학부)
Publication Information
Journal of the Korean Institute of Illuminating and Electrical Installation Engineers / v.18, no.6, 2004 , pp. 45-54 More about this Journal
Abstract
Usually, according as accumulation degree of semi-conductor element increases, dynamic mistake test time increases sharply, and use of pattern generator is essential at manufacturing process to solve these problem. In this paper, we designed the PLD(Programmable Logic Device) circuit of pattern generator to examine dynamic mistake of semi-conductor element. Such all item got result that is worth verified action of return trip and function through simulation, and satisfy.
Keywords
pattern generator; semiconductor device inspection; functional inspection;
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